- Oct 12, 2017
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Marek Olšák authored
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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Emma Anholt authored
The specs don't say you can't, but pairing it with an SFU write on the 7268 breaks all our simple shader tests using gl_MVP * gl_Vertex.
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Emma Anholt authored
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Marek Olšák authored
Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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Marek Olšák authored
This is optional (and no CAP). Implemented by radeonsi, ddebug, rbug, trace. Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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Marek Olšák authored
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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Marek Olšák authored
Some "standard" (_S) swizzle modes are displayable on Raven, even though the micro tile mode says it's not displayable. Expose the addrlib function to the driver. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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Elie Tournier authored
Signed-off-by: Elie Tournier <elie.tournier@collabora.com> Reviewed-by: Antia Puentes <apuentes@igalia.com> Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
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Rob Herring authored
The i965 driver has become dependent on x86 specific compiler builtin functions, so ensure it's disabled for non-x86 builds. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Rob Herring <robh@kernel.org>
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If an RS blit is done with source exactly the same as destination, and the hardware supports this, do an in-place resolve. This only fills in tiles that have not been rendered to using information from the TS. This is the same as the blob does and potentially saves significant bandwidth when doing i.MX6qp scanout using PRE, and when rendering to textures (though here using sampler TS would be even better). Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
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Eric Engestrom authored
The struct only contained the one field we're interested in. Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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Eric Engestrom authored
Fixes: b174a1ae "egl: Simplify the "driver" interface" Cc: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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Eric Engestrom authored
`_EGLDriver *drv` is a freshly calloc()'ed object, memset(0)'ing some of it is a no-op. Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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Eric Engestrom authored
Bonus: fixes a memleak on haiku when unloading the driver Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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If you set MESA_GLSL_CACHE_DISABLE, radv crashed. Fixes: fd24be13 (radv: make use of on-disk cache) Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
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Samuel Pitoiset authored
Based on RadeonSI. This improves some Vulkan demos by +1% to +3%. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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Samuel Pitoiset authored
This will allow us to emit the CLEAR_STATE packet instead of a bunch of useless packets when doing CS initialization. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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Samuel Pitoiset authored
Based on RadeonSI. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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Samuel Pitoiset authored
Similar to RadeonSI, also only call this function for <= VI. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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Nicolai Hähnle authored
Fixes dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8 Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
This is a left-over from my version of adding the new format after rebasing on Eric's version. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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- Oct 11, 2017
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Dave Airlie authored
Clarify when headers can be updated here. Reviewed-by: Gurchetan <Singh<gurchetansingh@chromium.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Timothy Arceri authored
The same line of code is a few lines above. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Timothy Arceri authored
If the app provided in-memory pipeline cache doesn't yet contain what we are looking for, or it doesn't provide one at all then we fallback to the on-disk cache. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Timothy Arceri authored
This is the drivers on-disk cache intended to be used as a fallback as opposed to the pipeline cache provided by apps. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Timothy Arceri authored
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Lionel Landwerlin authored
Rather than relying on size = stride * height, we can rely on anv_image's total size. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Daniel Stone <daniels@collabora.com>
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Lionel Landwerlin authored
It's not a problem if a BO has been allocated larger than we need it to be. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102940 Fixes: 818b8579 ("anv: Use the BO cache for DeviceMemory allocations") Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Cc: mesa-stable@lists.freedesktop.org
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Nicolai Hähnle authored
It's not used -- DFRACEXP gets array indexes of its exponent out-parameter lowered earlier -- and it wouldn't have worked correctly anyway when both dst and dst1 use relative addressing. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
Replace the undefined destination by a new temporary register. Cleanup merge_two_dsts while we're at it. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
Make sure we actually allocate two adjacent TGSI temporaries. The current code fails e.g. when an arithmetic operation has two operands with indirect accesses. I will send out a new piglit test (arb_gpu_shader_int64/execution/indirect-array-two-accesses.shader_test) Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
It's not used, and the assignment for the TGSI case was incorrect for sampler arrays. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
See the comment for the relevant spec quote. Fixes dEQP-GLES31.functional.srgb_texture_decode.skip_decode.srgba8.texel_fetch v2: note the interaction between ARB_bindless_texture and EXT_texture_sRGB_decode as a TODO Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Nicolai Hähnle authored
This fixes sequences like: 1. Context 1 samples from texture with sRGB decode enabled 2. Context 2 samples from texture with sRGB decode disabled 3. Context 1 samples from texture with sRGB decode disabled Previously, step 3 would see the prev_sRGBDecode value from context 2 and would incorrectly use the old sampler view with sRGB decode enabled. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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Tim Rowley authored
Start building vertex shaders as simd16. Disabled by default, set USE_SIMD16_SHADERS in knobs.h to experiment. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
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Tim Rowley authored
Increase the max allowed vector size from 256 to 512. No piglit llvmpipe regressions running on avx2. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
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Kenneth Graunke authored
The original implementation allocated a new BO here, but we decided to switch to intel_upload_space, which returns a reference to the current upload BO. We accidentally kept the brw_bo_alloc, even though it's no longer necessary - intel_upload_space will immediately unreference it, causing us to allocate and immediately free a buffer. Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
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Kenneth Graunke authored
Section 6.3.2 of the GL 4.5 spec says: "Any GL command which attempts to read from, write to, or change the state of a buffer object may generate an INVALID_OPERATION error if all or part of the buffer object is mapped ... However, only commands which explicitly describe this error are required to do so. If an error is not generated, such commands will have undefined results and may result in GL interruption or termination." Setting this flag allows us to skip walking over the buffer bindings for every enabled vertex attribute (_mesa_all_buffers_are_unmapped). Improves performance in GFXBench4's gl_driver2_off microbenchmark by 3.05797% +/- 0.709031% (n=33) on Apollolake. This breaks KHR-*.draw_elements_base_vertex_tests.invalid_mapped_bos, but that test is invalid and has been removed from the upstream CTS. Reviewed-by: Eric Anholt <eric@anholt.net>
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Dylan Baker authored
That requires a generated header that was rolled into a loop. fixes: a47c525f ("meson: build glx") Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
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Ilia Mirkin authored
Previously buffer offsets were passed in explicitly as an offset, which had to be added to the resource address. Now they are passed in via an increased 'start' parameter. As a result, we were double-adding the start offset in this kind of situation. This condition was triggered by piglit's draw-elements test which has a requisite glMultiDrawElements in combination with a small enough number of vertices to go through the immediate push path. Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer") Reported-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: mesa-stable@lists.freedesktop.org
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