- Oct 23, 2017
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Juan A. Suárez authored
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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Bas Nieuwenhuizen authored
Vulkan CTS does not expect the value to be clamped (at least for D32), and it makes a differences even though depth is in [0,1], due to strict inequalities. I couldn't find anything in the Vulkan spec about this, but the test seemed to be copied from GL tests and the GL spec only specifies clamping for fixed point formats. Hence I expect radeonsi to run into this at some point as well, but given that they still have a usecase with the Z16->Z32 promotion, I'll leave that for someone else to clean up. This at least fixes radv dEQP-VK.texture.shadow.* on VI. Fixes: 0f9e3251 'ac/nir: clamp shadow texture comparison value on VI' Reviewed-by: Dave Airlie <airlied@redhat.com>
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- Oct 22, 2017
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Bas Nieuwenhuizen authored
Since it also uses the output vector before writing to memory. Fixes: e38685cc 'Revert "radv: disable support for VEGA for now."' Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
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Bas Nieuwenhuizen authored
Fixes: 1bcb953e 'radv: handle GFX9 1D textures' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
Otherwise we just need to write them to the tf ring. this seems to improve the tessellation demo on Bonarie ~2190->~2230 fps Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Bas Nieuwenhuizen authored
Due to LLVM bugs. Fixes a bunch of dEQP-VK.glsl.indexing.* tests. Fixes: e38685cc 'Revert "radv: disable support for VEGA for now."' Reviewed-by: Dave Airlie <airlied@redhat.com>
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- Oct 21, 2017
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Bas Nieuwenhuizen authored
Mirrors the vram path. Fixes: d4ecc3c9 'ac/nir: Add loading from LDS for merged GS.' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Bas Nieuwenhuizen authored
When the gs_copy_shader is NULL (due to an incomplete cache), but the main shaders are found, we still do the nir, but we shouldn't compile the shaders again. For merged shaders we should also account for the missing shaders. Fixes: ce03c119 'radv: Add code to compile merged shaders.' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Bas Nieuwenhuizen authored
We specify 127 instead of 32 as the limit in vulkan. Fixes: 6bc42855 'radv: enable GS on GFX9' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Bas Nieuwenhuizen authored
With merged shaders the vertex shader may not exist. This got in because the offending patch was written before merged shaders were upstream, but committed after. Fixes: 75dfab24 'radv: refactor indirect draws with radv_draw_info' Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Bas Nieuwenhuizen authored
Otherwise for non-indexed draws we set and immediately unset RADV_CMD_DIRTY_INDEX_BUFFER. As all the set functions should clear their own bit, this is unnecessary. Fixes: 341529db 'radv: use optimal packet order for draws' Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Bas Nieuwenhuizen authored
As they were emitted after the new pipeline, the changed pipeline detection was not working anymore. Fixes: 341529db 'radv: use optimal packet order for draws' Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Bas Nieuwenhuizen authored
They don't take a single wave anymore and we need the barriers. Fixes: 6bc42855 'radv: enable GS on GFX9' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Bas Nieuwenhuizen authored
Fixes: ffaf4d60 'radv: Enable tessellation shaders for GFX9.' Reviewed-by: Dave Airlie <airlied@redhat.com>
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Need to lock around the whole process of retrieving cached shaders, and around GetPipelineCacheData. This fixes GPU hangs observed when creating multiple pipelines in parallel, which appeared to be due to invalid shader code being pulled from the cache. Signed-off-by: Alex Smith <asmith@feralinteractive.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Lionel Landwerlin authored
v2: Warn that support is still in alpha (Jason) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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Lionel Landwerlin authored
This workaround isn't listed on Gen10. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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Lionel Landwerlin authored
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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Emma Anholt authored
I typoed and was depending on v3d_xml.h (the gzipped xml)_, not on the v3d_packet_v33_pack.h that the compiler and QPU packing actually use.
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Emma Anholt authored
See e5fea0d6
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This was causing Android clang version 3.8.256229 to miscompile, presumably due to strict aliasing. Fixes: 14dc281c ("vc4: Enforce one-uniform-per-instruction after optimization.")
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- Oct 20, 2017
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Dylan Baker authored
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Tested-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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Dylan Baker authored
This is based heavily on Daniel Stone's work for the same, rebased on master and with a number of TODO's fixed. This does not implement glvnd (which is coming in a later patch) Meson builds egl slightly differently than autotools, namely it doesn't build an intermediate shared library. It doesn't do this because meson doesn't have problems with the name of the library being dynamically generated, so the glvnd and non-glvnd code can follow the same path. v2: - Don't reuse variable (Eric E.) Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Tested-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Daniel Stone <daniels@collabora.com>
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Dylan Baker authored
These files are needed by both vulkan wayland-wsi and by egl wayland-wsi, since the XML file is in src/egl/wayland/wayland-drm and we can include this directory in such a way that it will be loaded before egl and vulkan this allows us to avoid multiple calls to the same generator. Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-and-Tested-by: Eric Engestrom <eric@engestrom.ch>
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Dylan Baker authored
Previously this failed to change with_glx to disabled from auto if platform_x11 was unset or if no opengl apis were being built. v2: - swap conditional positions Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-and-Tested-by: Eric Engestrom <eric@engestrom.ch>
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Dylan Baker authored
fixes: b6037257 ("configure.ac: Bump libdrm_amdgpu version to 2.4.85.") Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Emma Anholt authored
Having 4 variables all called "gl_in_TexCoord0@n" isn't very informative, much better to see: decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0 (VARYING_SLOT_VAR0.x, 1, 0) decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@0 (VARYING_SLOT_VAR0.y, 1, 0) decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@1 (VARYING_SLOT_VAR0.z, 1, 0) decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@2 (VARYING_SLOT_VAR0.w, 1, 0) v2: Handle arrays and structs better (by Timothy) Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
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Emma Anholt authored
The pass only looks at var load/store intrinsics, not input load/store intrinsics, so assert that we don't see the other type. v2: Adjust comment indentation. Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
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Implicit sync kicks in when a buffer is used by two different amdgpu contexts simultaneously. Jobs that use explicit synchronization mechanisms end up needlessly waiting to be scheduled for long periods of time in order to achieve serialized execution. This patch disables implicit synchronization for all radv allocations except for wsi bos. The only systems that require implicit synchronization are DRI2/3 and PRIME. v2: mark wsi bos as RADV_MEM_IMPLICIT_SYNC v3: Add drm version check (Bas) Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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This allows us to pass extra parameters to the memory allocation operation that are not defined in the vulkan spec. This is useful for internal usage. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Expose the extension string as supported Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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This patch helps lower high priority compute latency. Found by bisecting a perf regression on computeparticles with high priority compute queues enabled. Reverting this micro-optimization doesn't seem to have any negative effect on performance on Dota2 or ssao. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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This extension allows the caller to change a queue's system wide priority. This is useful for applications with specific latency constraints. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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This is part of a cooperative scheduling approach used by radv. All drivers in the stack must opt-in to resource arbitration, otherwise GL based apps will be able to ignore system priorities. We always hardcode the field to its maximum value, instead of attempting to calculate an approximate usage. In testing, there were no benefits to using anything other than the maximum. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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When WAVE_LIMIT is set, a submission will opt-in for SPI based resource scheduling. Because this mechanism is cooperative, we must ensure that all submissions have this field set, otherwise they will bypass resource arbitration. We always hardcode the field to its maximum value, instead of attempting to calculate an approximate usage. In testing, there were no benefits to using anything other than the maximum. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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Bas Nieuwenhuizen authored
For VK_EXT_global_priority in radv. Acked-by: Andres Rodriguez <andresx7@gmail.com>
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Emma Anholt authored
A bit of spec text suggested that (like vc4) condition codes should be used for discards, and the simulator was fine with it, but the 7268 disagrees and you have to use SETMSF instead or the color comes through. Fixes glsl-fs-discard-01 and many of the interpolation-with-clipping tests.
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Emma Anholt authored
We don't have native instructions for them, so set up the lowering. Once we support the bfi instructions that get generated, they should start actually working.
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Emma Anholt authored
We weren't ever filling in the texture state record, so we'd dereference NULL from the shader.
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