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drm, drm/xe: Add a gpu page-table walker and rework XE bind- and unbind code to use it.

Thomas Hellström requested to merge thomash/kernel:gpu_pagewalk3 into xe

Add a gpu page table walker similar to the cpu page-table walker in mm/pagewalk.c

This is a rather big rewrite. Still missing is adding some debug printouts, and also splitting out other functions to xe_pt.c and compile it separately rather than just including it in an ugly way from xe_vm.c That's planned before merge.

Use the gpu page-table walker to rewrite page-table building for bind. There are a couple of problems we want to address by this:

  1. For 64K alignment systems, We need the GEN12_PTE_PS64 bits to be able to mix 64K-requiring VRAM and 4K-requiring system in the same 2MB L0 pagetable, which our uapi and also recently that of i915 allows.

  2. USM leaves need to be built at bind commit time, since they need to move under the userptr invalidation lock to protect against racing with the userptr invalidation mmu notifier. Moving under the lock will be addressed as a follow up, but leaf building is moved to bind commit and also uses the page-table walker for simplicity.

  3. Avoid rewinding and restarting resource cursors.

  4. Add documentation.

v2:

  • Added an additional pagetable tree level
  • Build leaves for pagefault mode only
  • Update the is_vram check when binding
  • Use the correct macro for .max_level when unbinding
  • Add a VRAM offset for tile 1.

v3:

  • Improved on debugging printouts
  • Moved page-table building code to xe_pt.c.
  • Documentation
  • Cosmetic cleanups.
Edited by Thomas Hellström

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