The source project of this merge request has been removed.
drm/xe: Fix logical mask for parallel engines
The logical mask for parallel engines should be a single bit for each placement.
e.g. If we want to place a 2 wide submission VCS0-1, the logical mask should be 0x1.
e.g. If we want to place a 2 wide submission on CCS0-1 or CCS2-3, the logical mask should be 0x5.
The logic to setup the logical mask was wrong, fix it.
Signed-off-by: Matthew Brost matthew.brost@intel.com