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drm/xe/guc: Enable SW signaling before submitting job

Matthew Brost requested to merge (removed):fix_fence_race into xe

Seal race where signaling is enabled after IRQ handler for completion fires. Enabling SW signaling first ensures when IRQ handler fires, the fence is in the list of pending fences.

Not a big deal to enable signaling early as the first thing the DRM scheduler does after run_job() returns is enable SW signaling.

Signed-off-by: Matthew Brost matthew.brost@intel.com

Fixes issue: #127 (closed)

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