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Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt: - Support using Zkr to seed KASLR - Support IPI-triggered CPU backtracing - Support for generic CPU vulnerabilities reporting to userspace - A few cleanups for missing licenses - The size limit on the XIP kernel has been removed - Support for tracing userspace stacks - Support for the Svvptc extension - Various cleanups and fixes throughout the tree * tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (47 commits) crash: Fix riscv64 crash memory reserve dead loop perf/riscv-sbi: Add platform specific firmware event handling tools: Optimize ring buffer for riscv tools: Add riscv barrier implementation RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE riscv: Enable bitops instrumentation riscv: Omit optimized string routines when using KASAN ACPI: RISCV: Make acpi_numa_get_nid() to be static riscv: Randomize lower bits of stack address selftests: riscv: Allow mmap test to compile on 32-bit riscv: Make riscv_isa_vendor_ext_andes array static riscv: Use LIST_HEAD() to simplify code riscv: defconfig: Disable RZ/Five peripheral support RISC-V: Implement kgdb_roundup_cpus() to enable future NMI Roundup riscv: avoid Imbalance in RAS riscv: cacheinfo: Add back init_cache_level() function riscv: Remove unused _TIF_WORK_MASK drivers/perf: riscv: Remove redundant macro check riscv: define ILLEGAL_POINTER_VALUE for 64bit ...
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- Documentation/devicetree/bindings/riscv/extensions.yaml 7 additions, 0 deletionsDocumentation/devicetree/bindings/riscv/extensions.yaml
- arch/riscv/Kconfig 8 additions, 0 deletionsarch/riscv/Kconfig
- arch/riscv/configs/defconfig 1 addition, 11 deletionsarch/riscv/configs/defconfig
- arch/riscv/errata/sifive/errata_cip_453.S 4 additions, 4 deletionsarch/riscv/errata/sifive/errata_cip_453.S
- arch/riscv/include/asm/acpi.h 0 additions, 2 deletionsarch/riscv/include/asm/acpi.h
- arch/riscv/include/asm/bitops.h 23 additions, 20 deletionsarch/riscv/include/asm/bitops.h
- arch/riscv/include/asm/cacheflush.h 17 additions, 1 deletionarch/riscv/include/asm/cacheflush.h
- arch/riscv/include/asm/exec.h 8 additions, 0 deletionsarch/riscv/include/asm/exec.h
- arch/riscv/include/asm/fence.h 1 addition, 0 deletionsarch/riscv/include/asm/fence.h
- arch/riscv/include/asm/hwcap.h 1 addition, 0 deletionsarch/riscv/include/asm/hwcap.h
- arch/riscv/include/asm/irq.h 5 additions, 0 deletionsarch/riscv/include/asm/irq.h
- arch/riscv/include/asm/page.h 21 additions, 8 deletionsarch/riscv/include/asm/page.h
- arch/riscv/include/asm/pgtable.h 17 additions, 11 deletionsarch/riscv/include/asm/pgtable.h
- arch/riscv/include/asm/sbi.h 1 addition, 0 deletionsarch/riscv/include/asm/sbi.h
- arch/riscv/include/asm/set_memory.h 1 addition, 1 deletionarch/riscv/include/asm/set_memory.h
- arch/riscv/include/asm/sparsemem.h 1 addition, 1 deletionarch/riscv/include/asm/sparsemem.h
- arch/riscv/include/asm/string.h 2 additions, 0 deletionsarch/riscv/include/asm/string.h
- arch/riscv/include/asm/thread_info.h 7 additions, 4 deletionsarch/riscv/include/asm/thread_info.h
- arch/riscv/include/asm/vmalloc.h 1 addition, 0 deletionsarch/riscv/include/asm/vmalloc.h
- arch/riscv/include/asm/xip_fixup.h 24 additions, 6 deletionsarch/riscv/include/asm/xip_fixup.h
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