igt@i915_selftest@perf@request - dmesg-fail - intel_gt_set_wedged called from perf_request_latency, i915/i915_request_perf_selftests: perf_request_latency failed with error -5

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13217/re-mtlp-6/igt@i915_selftest@perf@request.html

<6> [105.038640] vcs0: preemption dispatch latency 2503 cycles, 130404ns
<6> [105.038652] vcs0: preemption switch latency 4388 cycles, 228581ns
<6> [105.041042] vcs0: completion latency 667 cycles, 34740ns
<6> [105.042875] vcs1: semaphore response 35 cycles, 1849ns
<6> [105.044652] vcs1: idle dispatch latency 2883 cycles, 150170ns
<6> [105.045950] vcs1: busy dispatch latency 881 cycles, 45899ns
<6> [105.047416] vcs1: inter-request latency 125 cycles, 6550ns
<6> [105.050056] vcs1: context switch latency 1805 cycles, 94037ns
<7> [105.551195] intel_gt_set_wedged called from perf_request_latency+0xe5d/0x1d90 [i915]
<3> [105.557378] i915/i915_request_perf_selftests: perf_request_latency failed with error -5
<7> [105.557501] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [105.558504] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 02 to 00
<7> [105.559494] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [105.560178] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [105.560734] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [105.561285] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [105.561751] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [105.597538] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0xd/0x30 [i915]
<7> [105.681416] i915 0000:00:02.0: [drm:drm_client_release] drm_fb_helper
<4> [105.815100] i915: probe of 0000:00:02.0 failed with error -5