igt@runner@aborted - fail - GPU HANG: ecode 9:1:e757fefe
https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6682/shard-skl4/igt@runner@aborted.html
https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6682/shard-skl4/dmesg17.txt
<5>[ 155.862589] i915 0000:00:02.0: [drm] Resetting rcs0 for preemption time out
<6>[ 155.865769] i915 0000:00:02.0: [drm] GPU HANG: ecode 9:1:e757fefe, in kms_vblank [976]
<7>[ 155.880940] [drm:drm_mode_setcrtc] [CRTC:51:pipe A]
<7>[ 155.882519] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.enable (expected 1, found 0)
<7>[ 155.884019] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.active (expected 1, found 0)
<7>[ 155.885878] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in cpu_transcoder (expected 4, found -1)
<7>[ 155.887430] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in lane_count (expected 4, found 0)
<7>[ 155.889532] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in output_types (expected 0x00000100, found 0x00000000)
<7>[ 155.891616] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in framestart_delay (expected 1, found 0)
<7>[ 155.893109] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hdisplay (expected 2400, found 0)
<7>[ 155.894523] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_htotal (expected 2560, found 0)
<7>[ 155.895984] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hblank_start (expected 2400, found 0)
<7>[ 155.897781] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hblank_end (expected 2560, found 0)
<7>[ 155.899411] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hsync_start (expected 2448, found 0)
<7>[ 155.900849] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hsync_end (expected 2480, found 0)
<7>[ 155.902309] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vdisplay (expected 1600, found 0)
<7>[ 155.904014] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vtotal (expected 1646, found 0)
<7>[ 155.905456] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vblank_start (expected 1600, found 0)
<7>[ 155.906861] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vblank_end (expected 1646, found 0)
<7>[ 155.908288] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vsync_start (expected 1603, found 0)
<7>[ 155.909680] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vsync_end (expected 1613, found 0)
<7>[ 155.911588] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hdisplay (expected 2400, found 0)
<7>[ 155.913032] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_htotal (expected 2560, found 0)
<7>[ 155.914548] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_start (expected 2400, found 0)
<7>[ 155.915990] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_end (expected 2560, found 0)
<7>[ 155.917506] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_start (expected 2448, found 0)
<7>[ 155.918910] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_end (expected 2480, found 0)
<7>[ 155.920427] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vdisplay (expected 1600, found 0)
<7>[ 155.922061] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vtotal (expected 1646, found 0)
<7>[ 155.923944] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_start (expected 1600, found 0)
<7>[ 155.925836] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_end (expected 1646, found 0)
<7>[ 155.927459] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_start (expected 1603, found 0)
<7>[ 155.928877] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_end (expected 1613, found 0)
<7>[ 155.930317] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in pixel_multiplier (expected 1, found 0)
<7>[ 155.931737] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.flags (2) (expected 2, found 0)
<7>[ 155.933178] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.flags (8) (expected 8, found 0)
<7>[ 155.934662] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in pipe_bpp (expected 24, found 0)
<7>[ 155.935879] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_clock (expected 252750, found 0)
<7>[ 155.937290] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_clock (expected 252750, found 0)
<7>[ 155.938768] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in port_clock (expected 270000, found 0)
<7>[ 155.940185] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CRTC:51:pipe A] releasing DPLL 0
<7>[ 155.942823] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [CRTC:51:pipe A] dbuf slices 0x1 -> 0x0, ddb (0 - 892) -> (0 - 0), active pipes 0x1 -> 0x0
<7>[ 155.944800] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb ( 0 - 859) -> ( 0 - 0), size 859 -> 0
<7>[ 155.946209] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:47:cursor A] ddb ( 859 - 892) -> ( 0 - 0), size 33 -> 0
<7>[ 155.947626] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm, swm, stwm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm
<7>[ 155.949036] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] lines 0, 2, 3, 4, 7, 8, 9, 10, 0, 0, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7>[ 155.950507] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] blocks 5, 40, 58, 66, 127, 155, 166, 198, 0, 0, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7>[ 155.951947] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb 6, 41, 59, 67, 128, 156, 167, 199, 0, 0, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7>[ 155.953982] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
<7>[ 155.955473] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7>[ 155.956985] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [CRTC:51:pipe A] enable: no [modeset]
<7>[ 155.958457] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:31:plane 1A] fb: [NOFB], visible: no
<7>[ 155.959919] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7>[ 155.961316] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:47:cursor A] fb: [NOFB], visible: no
<7>[ 155.963693] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR1
<7>[ 155.971759] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] Turning [ENCODER:94:DDI A/PHY A] VDD on
<7>[ 155.973290] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
<7>[ 155.976598] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]]
<7>[ 156.186664] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level [i915]] set backlight PWM = 0
<7>[ 156.189504] i915 0000:00:02.0: [drm:intel_disable_transcoder [i915]] disabling pipe A
<7>[ 156.207042] i915 0000:00:02.0: [drm:intel_pps_off_unlocked [i915]] Turn [ENCODER:94:DDI A/PHY A] panel power off
<7>[ 156.208560] i915 0000:00:02.0: [drm:intel_pps_off_unlocked [i915]] Wait for panel power off time
<7>[ 156.210264] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
<7>[ 156.259550] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7>[ 156.261486] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI_IO_A_E
<7>[ 156.261722] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12001010, pins 0x00000010, long 0x00000010
<7>[ 156.262735] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:94:DDI A/PHY A] - long
<7>[ 156.263092] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 0x1, on? 1) for [CRTC:51:pipe A]
<7>[ 156.264141] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7>[ 156.264772] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7>[ 156.265861] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:94:DDI A/PHY A]
<7>[ 156.266223] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:94:DDI A/PHY A]
<7>[ 156.267787] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:102:DDI B/PHY B]
<7>[ 156.269540] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:104:DP-MST A]
<7>[ 156.270704] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:105:DP-MST B]
<7>[ 156.272125] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:106:DP-MST C]
<7>[ 156.273231] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:117:DDI C/PHY C]
<7>[ 156.275129] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:119:DP-MST A]
<7>[ 156.276447] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:120:DP-MST B]
<7>[ 156.278598] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:121:DP-MST C]
<7>[ 156.280011] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:95:eDP-1]
<7>[ 156.281704] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 0
<7>[ 156.283580] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 1
<7>[ 156.284955] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 2
<7>[ 156.286606] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 3
<7>[ 156.288625] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:51:pipe A]
<7>[ 156.290850] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DC_off
<7>[ 156.292481] i915 0000:00:02.0: [drm:skl_enable_dc6 [i915]] Enabling DC6
<7>[ 156.293942] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 02
<7>[ 156.302930] [IGT] kms_vblank: exiting, ret=0
<7>[ 156.370204] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:95:eDP-1] Limiting display bpp to 24 (EDID bpp 24, max requested bpp 36, max platform bpp 36)
<7>[ 156.371540] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP link computation with max lane count 4 max rate 270000 max bpp 24 pixel clock 252750KHz
<7>[ 156.372725] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP lane count 4 clock 270000 bpp 24
<7>[ 156.374252] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP link rate required 758250 available 1080000
<7>[ 156.375734] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CRTC:51:pipe A] hw max bpp: 24, pipe bpp: 24, dithering: 0
<7>[ 156.377232] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:94:DDI A/PHY A] [CRTC:51:pipe A]
<7>[ 156.378456] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.enable (expected 0, found 1)
<7>[ 156.380798] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.active (expected 0, found 1)
<7>[ 156.383239] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in cpu_transcoder (expected -1, found 4)
<7>[ 156.385582] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in lane_count (expected 0, found 4)
<7>[ 156.387305] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in dp_m_n (expected tu 0 data 0/0 link 0/0, or tu 0 data 0/0 link 0/0, found tu 64, data 5889501/8388608 link 490791/524288)
<7>[ 156.389140] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in output_types (expected 0x00000000, found 0x00000100)
<7>[ 156.390730] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in framestart_delay (expected 0, found 1)
<7>[ 156.392274] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hdisplay (expected 0, found 2400)
<7>[ 156.393761] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_htotal (expected 0, found 2560)
<7>[ 156.395822] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling always-on
<7>[ 156.397683] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hblank_start (expected 0, found 2400)
<7>[ 156.399510] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hblank_end (expected 0, found 2560)
<7>[ 156.400891] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hsync_start (expected 0, found 2448)
<7>[ 156.402515] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hsync_end (expected 0, found 2480)
<7>[ 156.404082] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vdisplay (expected 0, found 1600)
<7>[ 156.405586] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vtotal (expected 0, found 1646)
<7>[ 156.407102] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vblank_start (expected 0, found 1600)
<7>[ 156.408599] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vblank_end (expected 0, found 1646)
<7>[ 156.411102] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vsync_start (expected 0, found 1603)
<7>[ 156.412513] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_vsync_end (expected 0, found 1613)
<7>[ 156.413996] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hdisplay (expected 0, found 2400)
<7>[ 156.415477] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_htotal (expected 0, found 2560)
<7>[ 156.416740] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_start (expected 0, found 2400)
<7>[ 156.418086] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_end (expected 0, found 2560)
<7>[ 156.419500] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_start (expected 0, found 2448)
<7>[ 156.420765] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_end (expected 0, found 2480)
<7>[ 156.422305] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vdisplay (expected 0, found 1600)
<7>[ 156.423804] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vtotal (expected 0, found 1646)
<7>[ 156.425089] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_start (expected 0, found 1600)
<7>[ 156.426575] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_end (expected 0, found 1646)
<7>[ 156.428207] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_start (expected 0, found 1603)
<7>[ 156.429667] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_end (expected 0, found 1613)
<7>[ 156.430901] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in pixel_multiplier (expected 0, found 1)
<7>[ 156.432506] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.flags (2) (expected 0, found 2)
<7>[ 156.433628] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.flags (8) (expected 0, found 8)
<7>[ 156.435080] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in pipe_bpp (expected 0, found 24)
<7>[ 156.436269] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_clock (expected 0, found 252750)
<7>[ 156.437778] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.adjusted_mode.crtc_clock (expected 0, found 252750)