igt@kms_fbcon_fbt@fbc-suspend - incomplete - PM: suspend entry (deep)
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12168/re-rpls-1/igt@kms_fbcon_fbt@fbc-suspend.html
<7> [268.106349] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:170:DDI TC4/PHY E][DPRX] 8b/10b, lanes: 4, vswing levels: 3(max)/3(max)/3(max)/3(max), pre-emphasis levels: 0/0/0/0
<7> [268.110445] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [ENCODER:170:DDI TC4/PHY E][DPRX] Channel EQ done. DP Training successful
<7> [268.110502] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:171:DP-4][ENCODER:170:DDI TC4/PHY E][DPRX] Link Training passed at link rate = 540000, lane count = 4
<7> [268.111117] i915 0000:00:02.0: [drm:intel_enable_transcoder [i915]] enabling pipe B
<7> [268.111203] i915 0000:00:02.0: [drm:intel_audio_codec_enable [i915]] [CONNECTOR:171:DP-4][ENCODER:170:DDI TC4/PHY E] Enable audio codec on pipe B, 36 bytes ELD
<7> [268.111278] i915 0000:00:02.0: [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
<7> [268.111352] i915 0000:00:02.0: [drm:intel_fbc_update [i915]] reserved 33177600 bytes of contiguous stolen space for FBC, limit: 1
<7> [268.111418] i915 0000:00:02.0: [drm:intel_fbc_update [i915]] Enabling FBC on [PLANE:31:plane 1A]
<7> [268.127896] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x3
<7> [268.128049] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:145:HDMI-A-1]
<7> [268.128120] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:80:pipe A]
<7> [268.128246] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 0
<7> [268.128348] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:171:DP-4]
<7> [268.128418] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:131:pipe B]
<7> [268.128523] i915 0000:00:02.0: [drm:intel_ddi_get_config [i915]] [ENCODER:170:DDI TC4/PHY E] Fec status: 0
<7> [268.128596] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 1
<7> [274.788336] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A
<7> [274.798843] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe B
<6> [275.128976] PM: suspend entry (deep)
<6> [275.133280] Filesystems sync: 0.000 seconds