Skip to content

igt@i915_selftest@live@gtt - dmesg-fail - i915/i915_gem_gtt_live_selftests: igt_ppgtt_misaligned_pin failed with error -28

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11975/bat-dg2-10/igt@i915_selftest@live@gtt.html

<7> [346.158727] i915 0000:03:00.0: [drm:__drm_fb_helper_initial_config_and_unlock [drm_kms_helper]] test CRTC 3 primary plane
<6> [346.158739] i915 0000:03:00.0: [drm] Cannot find any crtc or sizes
<7> [346.198662] i915 0000:03:00.0: [drm:intel_power_well_disable [i915]] disabling always-on
<6> [348.065978] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_lowlevel
<7> [348.566870] lowlevel_hole timed out before 934/524288
<6> [348.603028] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_drunk
<7> [349.103902] drunk_hole timed out after 1103/524288
<6> [349.104058] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_walk
<7> [349.604761] walk_hole timed out at 481000
<6> [349.604782] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_pot
<7> [350.537252] pot_hole timed out after 38/47
<6> [350.537271] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_fill
<7> [351.080766] fill_hole timed out (npages=131072, prime=2)
<6> [351.080809] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_shrink
<7> [351.937464] __shrink_hole timed out at ofset 3fffff000 [0 - 1000000000000]
<6> [352.117987] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_shrink_boom
<6> [352.228748] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_misaligned_pin
<3> [352.291695] i915/i915_gem_gtt_live_selftests: igt_ppgtt_misaligned_pin failed with error -28
<7> [352.291728] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling always-on
<7> [352.292051] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [352.292403] i915 0000:03:00.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 01 to 00
<7> [352.292859] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [352.293089] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [352.293332] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [352.293581] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [352.293864] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [352.326786] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0x15/0x40 [i915]
<7> [352.381633] i915 0000:03:00.0: [drm:drm_client_release] drm_fb_helper
<4> [352.443250] i915: probe of 0000:03:00.0 failed with error -28
To upload designs, you'll need to enable LFS and have an admin enable hashed storage. More information