igt@kms_psr@primary_blt - dmesg-warn - *ERROR* rcs0 TLB invalidation did not complete in 4ms!

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1144/fi-kbl-soraka/igt@kms_psr@primary_blt.html

<7> [423.942015] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level [i915]] set backlight PWM = 100
<7> [423.943443] i915 0000:00:02.0: [drm:intel_fbc_update [i915]] reserved 31129600 bytes of contiguous stolen space for FBC, limit: 1
<7> [423.944541] i915 0000:00:02.0: [drm:intel_fbc_update [i915]] Enabling FBC on [PLANE:31:plane 1A]
<7> [423.956397] i915 0000:00:02.0: [drm:intel_psr_post_plane_update [i915]] Enabling PSR1
<7> [423.961674] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:95:eDP-1]
<7> [423.963309] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:51:pipe A]
<7> [423.966382] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.36 [i915]] DPLL 0
<7> [424.117381] [drm:drm_mode_setcrtc] [CRTC:51:pipe A]
<7> [424.117684] [drm:drm_mode_setcrtc] [CONNECTOR:95:eDP-1]
<7> [424.331854] i915 0000:00:02.0: [drm:i915_gem_context_create_ioctl [i915]] HW context 1 created
<3> [424.370996] i915 0000:00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not complete in 4ms!
<7> [424.382065] [drm:drm_mode_setcrtc] [CRTC:51:pipe A]
<7> [424.382934] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.enable (expected 1, found 0)
<7> [424.384344] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.active (expected 1, found 0)
<7> [424.385502] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in cpu_transcoder (expected 4, found -1)
<7> [424.386640] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in lane_count (expected 4, found 0)
<7> [424.389133] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in output_types (expected 0x00000100, found 0x00000000)
<7> [424.390535] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in framestart_delay (expected 1, found 0)
<7> [424.393180] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hdisplay (expected 2400, found 0)
<7> [424.394436] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_htotal (expected 2560, found 0)
<7> [424.395850] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:51:pipe A] fastset mismatch in hw.pipe_mode.crtc_hblank_start (expected 2400, found 0)
<7> [424.397262] i915 0000:00:02.0: [drm:pipe_config_