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The migration is almost done, at least the rest should happen in the background. There are still a few technical difference between the old cluster and the new ones, and they are summarized in this issue. Please pay attention to the TL:DR at the end of the comment.
Created attachment 125593
picture of the corruption
(this is a split-off from bug 95207 after solving modelines detection)
While modelines are properly detected now and native resolution can be set, the monitor shows corrupted image (see attached photo).
This is reproducible anytime with random level of corruption. So far I have never been able to get proper stable image. Lower resolutions (via single DP cable) work fine, so does Windows in native resolution (dual DP).
No interesting messages in the logs either, attached below.
This is Dell UP2715K, a 5k tiled monitor connected via two DP ports on a C236 board running Skylake Xeon.
I'll hang on IRC on #intel-gfx (nick: tbzatek) for direct debugging.
After number of experiments I've managed to get proper image in native resolution. Hit rate is very low though, it takes about 20 tries fiddling with xrandr trying to get the right sync.
Here is my theory: the monitor is one physical panel taking data from two DP inputs making a final composited image from both, side by side. It probably takes one output as a reference and tries to synchronize scanlines from the other. It also probably expects equal timings and particular frames sent at the same moment on both outputs.
When I see tearing (e.g. scrolling a large image) it's consistent across whole image, on both outputs.
This was normally not the case when I had two monitors connected to each DP port in a clone mode - tearing was at different positions (perhaps not relevant, but worth to mention).
Same problem here with Dell 5K and a Skylake i915 cpu/gpu.
I think the problem is that the intel driver is assigning seperate PLLs for each port. The capability exists to share a common PLL clock source for both ports.
I suspect the Windows driver sees both ports have the same resolution and framerate and shares a PLL automatically.
Is there a way to force PLL sharing to test this theory?
Same issue here as well. Tried on Fedora 25 on a Dell XPS 15 (9550) laptop and the Dell 5k monitor (up2715k). It looks exactly like the corruption image that Tomas Bzatek posted.
It freaked me out at first because the flickering that happened sort of "burned in" to the monitor. Even when I unplugged it from the laptop it was still flickering the same image. If anyone else runs into this, just leave it running at a 4k resolution (or any that doesn't have the corruption issues) and eventually it fixes itself.
I'm using Skylake i915 CPU/GPU (HD Graphics 530). I confirmed it wasn't hardware since it works on Windows. After years of Linux I had to revert back to Windows so that I can use the monitor at its real resolution. =<br>
Will be watching this issue so I can hopefully bounce back to Linux again. I can help test/debug as well.
Well for the time being I managed to make it run by using the buggy BFS scheduler (out-of-the-tree CFS process scheduler replacement) that somehow makes the whole drm subsystem laggy. Please disregard my findings in comment 3, it's more or less independent of Xorg settings. No luck with setting up Xinerama either (in reply to comment 4).
My theory is that the bug causes delaying the phase the outputs are set up and once the lag is over, it activates both outputs at the same moment. It's lame but it's a sufficient workaround for now :-)
And when the outputs are in sync, the monitor holds the sync for a whole day, without flickering. There are no issues with cursor or windows DP1 <-> DP2 transition either, it really feels like a single screen, even tearing is in sync. Good work on that front.
Unfortunately I didn't have much time to debug this issue, it's still on my TODO list though. Assigning common PLL clock source (as suggested in comment 6) could be the way to go. I've also tried patching the kernel to delay the second output to be in vsync with the first (as suggested by intel developers on irc), with no luck so far.
Would you have any instructions on how I may get the same version of BFS running? Would really love to get a working Linux even if it is buggy in other ways. Also, when I plug the monitor in, it doesn't correctly configure both monitors together. I have to manually put in some xrandr commands: xrandr --output DP-1 --mode 2560x2880 --output DP-2 --mode 2560x2880 --right-of DP-1 Something like this. Is this what you're doing, or do you have an xorg config? Or does your desktop just auto-detect?
As soon as I run the above command is when I get the really weird and glitchy tiling errors with flickering that stays for a while. I actually tried using the kernel in this repo (https://copr.fedorainfracloud.org/coprs/hubbitus/kernel-pf/) which uses MuQSS instead of BFS, but same issue. I may try compiling BFS into the kernel to see if that works instead.
I also use Gnome. You have to set the display to its native resolution (5.120 x 2.880) in Gnome-Display-Settings. Or to 2x 2560x2888 in nVidia-Settings.
Both ways work. And the "two half displays" are handled as one by Gnome automatically.
Sorry Andrew, didn't have time to dive into the sources and hack the PLL sharing theory yet.
Elio, is the NEEDINFO targeted to the original reporter? As far as I've tested the drm-intel branch about a month ago, the issue was still present. I'll retest tonight again.
Yes, my bad, probably we need to check this issue with latest kernel version so far. 4.10 since a lot of new patches were merged for DP. Changing state
Just tested latest drm-intel and vanilla 4.11-rc1, both with the same bad results. The result in attachment 125593 still stands. Also tried turning "nuclear_pageflip" module argument on and off, with no difference.
Same problem here with Dell 5K and a Skylake i915 cpu/gpu.
I think the problem is that the intel driver is assigning seperate PLLs for
each port. The capability exists to share a common PLL clock source for
both ports.
I suspect the Windows driver sees both ports have the same resolution and
framerate and shares a PLL automatically.
If anyone does have the hardware and Windows readily available, dumping the PCI MMIO BAR on Windows would let us check how it configures the hardware in this case. Alas, I have no idea what the tool for dumping it is.