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Chris Wilson authored
On Skylake, BB_OFFSET seems to be unstable. Since this is an offset into the batch at the time of CS execution, it should be actively written to as we read from the register so allow it a qword of discrepancy (since the CS should be reading in qwords). This still allows us to detect dirt across the rest of the register field, should that be required. v2: restrict ignore_bits to only BIT(2) that we see fluctuate in testing (Antonio) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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