[CI][BAT] igt@drv_selftest@live_hangcheck - incomplete
Submitted by Martin Peres
Assigned to Default DRI bug account
Link to original bug (#108044)
Description
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4861/fi-kbl-7560u/igt@drv_selftest@live_hangcheck.html
<6> [479.752836] [IGT] drv_selftest: executing
<6> [479.761324] [IGT] drv_selftest: starting subtest live_hangcheck
<5> [479.820575] Setting dangerous option live_selftests - tainting kernel
<7> [479.840324] [drm:intel_pch_type [i915]] Found SunrisePoint LP PCH
<7> [479.840379] [drm:i915_driver_load [i915]] WOPCM size: 1024KiB
<7> [479.840449] [drm:intel_uc_init_early [i915]] enable_guc=0 (submission:no huc:no)
<7> [479.840498] [drm:intel_uc_init_early [i915]] guc_log_level=0 (enabled:no, verbose:no, verbosity:0)
<7> [479.840556] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
<6> [479.840650] [drm] Found 64MB of eDRAM
<6> [479.841533] [drm] Display disabled (module parameter)
<7> [479.841586] [drm:i915_driver_load [i915]] ppgtt mode: 3
<7> [479.841748] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [479.841809] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
<7> [479.841850] [drm:i915_ggtt_probe_hw [i915]] DSM size = 32M
<6> [479.841878] [drm] Replacing VGA console driver
<7> [479.842160] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 7f700047
<7> [479.842205] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 32768K, usable: 31744K
<7> [479.842615] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
<7> [479.842684] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x7aee7018
<7> [479.842855] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [479.842922] [drm:intel_opregion_setup [i915]] SWSCI supported
<7> [479.851748] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583
<7> [479.851791] [drm:intel_opregion_setup [i915]] ASLE supported
<7> [479.851825] [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [479.851860] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4 (closed))
<7> [479.851889] [drm:skl_dram_get_channel_info [i915]] (size:width:rank) L(4GB:X32:dual) S(0GB:X8:single)
<7> [479.851915] [drm:skl_dram_get_channel_info [i915]] (size:width:rank) L(4GB:X32:dual) S(0GB:X8:single)
<7> [479.851943] [drm:skl_dram_get_channels_info [i915]] memory configuration is Symmetric memory
<7> [479.851979] [drm:i915_driver_load [i915]] DRAM bandwidth:29866672 KBps, total-channels: 2
<7> [479.852012] [drm:i915_driver_load [i915]] DRAM rank: dual rank 16GB-dimm:no
<7> [479.852049] [drm:intel_bios_init [i915]] Skipping VBT init due to disabled display.
<7> [479.852510] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
<7> [479.852552] [drm:i915_driver_load [i915]] rawclk rate: 24000 kHz
<7> [479.852582] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [479.852690] [drm:intel_power_well_enable [i915]] enabling power well 1
<7> [479.852788] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
<7> [479.852828] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
<7> [479.853330] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
<7> [479.853366] [drm:skl_set_cdclk [i915]] Max dotclock rate: 675000 kHz
<7> [479.853414] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [479.853441] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [479.853468] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [479.853498] [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [479.853539] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
<7> [479.853565] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
<7> [479.853591] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
<7> [479.853616] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
<7> [479.853653] [drm:intel_csr_ucode_init [i915]] Loading i915/kbl_dmc_ver1_04.bin
<7> [479.854324] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [479.854363] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
<7> [479.854390] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
<7> [479.854415] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
<7> [479.854440] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
<7> [479.854465] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
<7> [479.854489] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
<7> [479.854512] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
<7> [479.854536] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
<7> [479.854572] [drm:intel_modeset_init [i915]] 0 display pipe available.
<7> [479.854611] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 337500 kHz, VCO 8100000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 0
<7> [479.855001] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
<7> [479.855039] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
<7> [479.855076] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
<7> [479.855112] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
<7> [479.855148] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
<6> [479.856304] [drm] Finished loading DMC firmware i915/kbl_dmc_ver1_04.bin (v1.4)
<7> [479.856490] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
<7> [479.856525] [drm:intel_ctx_workarounds_init [i915]] Number of context specific w/a: 10
<7> [479.856847] [drm:i915_gem_contexts_init [i915]] logical context support initialized
<6> [479.862322] [drm] Initialized i915 1.6.0 20180921 for 0000:00:02.0 on minor 0
<7> [479.863372] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
<7> [479.863428] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
<7> [479.863455] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
<7> [479.863482] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
<7> [479.863507] [drm:intel_power_well_disable [i915]] disabling power well 2
<7> [479.863550] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [479.863576] [drm:gen9_dc_off_power_well_disable [i915]] Enabling DC6
<7> [479.863601] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [479.864129] [drm:intel_power_well_disable [i915]] disabling always-on
<7> [479.864141] i915 device info: pciid=0x5926 rev=0x06 platform=KABYLAKE gen=9
<7> [479.864144] i915 device info: is_mobile: no
<7> [479.864146] i915 device info: is_lp: no
<7> [479.864149] i915 device info: is_alpha_support: no
<7> [479.864151] i915 device info: has_64bit_reloc: yes
<7> [479.864153] i915 device info: has_aliasing_ppgtt: yes
<7> [479.864155] i915 device info: has_csr: yes
<7> [479.864157] i915 device info: has_ddi: yes
<7> [479.864159] i915 device info: has_dp_mst: yes
<7> [479.864162] i915 device info: has_reset_engine: yes
<7> [479.864164] i915 device info: has_fbc: yes
<7> [479.864166] i915 device info: has_fpga_dbg: yes
<7> [479.864168] i915 device info: has_full_ppgtt: yes
<7> [479.864170] i915 device info: has_full_48bit_ppgtt: yes
<7> [479.864172] i915 device info: has_gmch_display: no
<7> [479.864174] i915 device info: has_guc: yes
<7> [479.864177] i915 device info: has_guc_ct: no
<7> [479.864179] i915 device info: has_hotplug: yes
<7> [479.864181] i915 device info: has_l3_dpf: no
<7> [479.864183] i915 device info: has_llc: yes
<7> [479.864185] i915 device info: has_logical_ring_contexts: yes
<7> [479.864187] i915 device info: has_logical_ring_elsq: no
<7> [479.864189] i915 device info: has_logical_ring_preemption: yes
<7> [479.864191] i915 device info: has_overlay: no
<7> [479.864194] i915 device info: has_pooled_eu: no
<7> [479.864196] i915 device info: has_psr: yes
<7> [479.864198] i915 device info: has_rc6: yes
<7> [479.864200] i915 device info: has_rc6p: no
<7> [479.864202] i915 device info: has_runtime_pm: yes
<7> [479.864204] i915 device info: has_snoop: no
<7> [479.864206] i915 device info: has_coherent_ggtt: yes
<7> [479.864209] i915 device info: unfenced_needs_alignment: no
<7> [479.864211] i915 device info: cursor_needs_physical: no
<7> [479.864213] i915 device info: hws_needs_physical: no
<7> [479.864215] i915 device info: overlay_needs_physical: no
<7> [479.864217] i915 device info: supports_tv: no
<7> [479.864219] i915 device info: has_ipc: yes
<7> [479.864221] i915 device info: slice total: 2, mask=0003
<7> [479.864223] i915 device info: subslice total: 6
<7> [479.864225] i915 device info: slice0: 3 subslices, mask=0007
<7> [479.864227] i915 device info: slice1: 3 subslices, mask=0007
<7> [479.864229] i915 device info: slice2: 0 subslices, mask=0000
<7> [479.864231] i915 device info: EU total: 48
<7> [479.864233] i915 device info: EU per subslice: 8
<7> [479.864235] i915 device info: has slice power gating: yes
<7> [479.864237] i915 device info: has subslice power gating: no
<7> [479.864239] i915 device info: has EU power gating: yes
<7> [479.864241] i915 device info: CS timestamp frequency: 12000 kHz
<6> [479.864243] [drm] DRM_I915_DEBUG enabled
<6> [479.864245] [drm] DRM_I915_DEBUG_GEM enabled
<6> [479.864246] [drm] DRM_I915_DEBUG_RUNTIME_PM enabled
<6> [479.864250] i915: Performing live selftests with st_random_seed=0x69908511 st_timeout=1000
<7> [479.865280] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [479.865344] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [479.865759] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [479.976244] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [479.976320] [drm:gen9_dc_off_power_well_disable [i915]] Enabling DC6
<7> [479.976355] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [479.976868] [drm:intel_power_well_disable [i915]] disabling always-on
<7> [484.874438] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [484.874479] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [484.874840] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [489.983864] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [489.983938] [drm:gen9_dc_off_power_well_disable [i915]] Enabling DC6
<7> [489.983980] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [489.984502] [drm:intel_power_well_disable [i915]] disabling always-on
<6> [490.879691] i915_reset_engine(rcs0:idle): 207341 resets
<6> [491.880689] i915_reset_engine(bcs0:idle): 224364 resets
<6> [492.881690] i915_reset_engine(vcs0:idle): 213564 resets
<6> [493.882687] i915_reset_engine(vcs1:idle): 217252 resets