Get rid of some copy/pasta and open coding of a common pattern, waiting
for GPU commands to complete.

Signed-off-by: Rob Clark <robdclark@chromium.org>

Some qcom devices support CTM but not gamma/degamma LUT.

Note, the remaining failures on msm are due to CTM being supported on
one CRTC but not the other.  But the property is exposed on both.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

Tests need to be documented, as otherwise its goal will be
lost with time. Keeping documentation out of the sources is also
not such a good idea, as they tend to bitrot.

So, add a script to allow keeping the documentation inlined, and
add tools to verify if the documentation has gaps.

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Zack Rusin authored 2 years ago and Kamil Konieczny committed 2 years ago

Because igt always tries to load i915 driver first for DRIVER_ANY every
test using DRIVER_ANY on anything but i915 starts by printing a warning
that i915 couldn't be loaded.
Lets switch it to a general info line because it makes it hard to spot
actual warnings when every subtest starts by warning about not being
able to load i915.

v1: changed commit title to lib/igt_kmod (Kamil)

Signed-off-by: Zack Rusin <zackr@vmware.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>

Christopher Snowhill authored 2 years ago and Kamil Konieczny committed 2 years ago

Add label and abbreviated display name for the compute engine class.

Signed-off-by: Christopher Snowhill <kode54@gmail.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

Users reported oopses on list corruptions when using i915 perf with a
number of concurrently running graphics applications.  That indicates we
are currently missing some important tests for such scenarios.  Cover
that gap.

Root cause analysis pointed out to an issue in barrier processing code and
its interaction with perf replacing kernel contexts' active barriers with
its own requests.

Add a new test intended for exercising intentionally racy barrier tasks
list processing and its interaction with other i915 subsystems.  As a
first subtest, add one that exercises the interaction of remote requests
with barrier tasks list handling, especially barrier preallocate / acquire
operations performed during context first pin / last unpin.

The code is partially inspired by Chris Wilson's igt@perf@open-race
subtest, which I was not able to get an Ack for from upstream.

v4: fix typo in test description and make it generic so it will not need
    to be changed soon (Kamil),
  - rename workload functions instead of providing name wrappers (Kamil),
  - no need for all physical engines to be tested (Kamil).
v3: don't add the new subtest to gem_ctx_exec which occurred blocklisted,
    create a new test hosting the new subtest, update commit descripion,
  - prepare parameters for perf open still in the main thread to avoid
    test failures on platforms with no perf support (will skip now),
  - call perf open with OA buffer reports disabled, this will make sure
    that the perf API doesn't unnecessarily enable the OA unit, while the
    test still runs the targeted code (Umesh),
  - replace additional code for OA exponent calculations with a reasonable
    hardcoded value (Umesh).
v2: convert to a separate subtest, not a variant of another one (that has
    been dropped from the series),
  - move the subtest out of tests/i915/perf.c (Ashutosh), add it to
    tests/i915/gem_ctx_exec.c,
  - don't touch lib/i915/perf.c (Umesh, Ashutosh), duplicate reused code
    from tests/i915/perf.c in tests/i915/gem_ctx_exec.c.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/6333
Cc: Chris Wilson <chris.p.wilson@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/522916/


[janusz: close fd on exit from intel_context_first_pin_last_unpin_loop]
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>

In newer hardware versions (i.e. display version >= 14), the second
scaler doesn't support downscaling. Current driver design in the
case of 2 plane scaling scenario is if plane1-US and plane2-DS,
it's reject for now. That's why new tests are added for plane1-DS
and plane2-US, so that different DS+US combinations can be validated.

v2: -minor fix
v3: -change from if-else ladder to switch (JP)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Maíra Canal authored 2 years ago and Kamil Konieczny committed 2 years ago

Add three subtests that combine CL jobs and CSD jobs, to assure the
proper synchronization of different queues, especially the
independence between them. Moreover, tests the relationship between
single syncobjs and multisync using mixed jobs as well.

Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Maíra Canal <mcanal@igalia.com>

Maíra Canal authored 2 years ago and Kamil Konieczny committed 2 years ago

Add subtests for the DRM_IOCTL_V3D_SUBMIT_CSD, which ensures
that improper parameters return an errno and test multisync and
single sync abilities. For most of the subtests, the empty shader is the
base of the submission, as it is one of the simplest jobs possible,
allowing it to test the synchronization abilities of the V3D.

Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Maíra Canal <mcanal@igalia.com>

Maíra Canal authored 2 years ago and Kamil Konieczny committed 2 years ago

In order to submit a compute dispatch job, a BO must contain the
assembly shader that corresponds to the job. Therefore, create a helper
to encapsulate a simple compute dispatch job. This helper sets the
configurations (cfg) needed for the job and has the assembled instructions
necessary to process an empty shader, just like the following one:

    #version 310 es
    layout (local_size_x = 1) in;
    void main (void) {}

Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Maíra Canal <mcanal@igalia.com>

Use a helper that checks blitter command flags instead of directly
checking Flat CCS compression support. Delete the function that checks
it. Check for extended block-copy command when initializing the
copy object in block_copy and block_multicopy tests.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Add a predicate that checks if a command has a specific property.
Introduce helpers that check if a platform uses an extended
version of the block-copy command or supports compression. Add
a getter for blt_cmd_info to intel_cmds_info library. Group
functions together in i915_blt header file.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Blitter commands may have different properties depending on the
platform. Add a new field to blt_cmd_info struct to describe
their properties. Update block-copy definitions for DG2 and MTL
to use that field.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

The structs here describe the properties of copy commands, not
just tiling formats they support. Make the library name more
generic. Rename blt_tiling_info struct to blt_cmd_info to match
this change.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

The struct stores information on more than just one blitter cmd,
so the current name is slightly confusing. Also, we might want
to store information on other copy commands, like the one provided
by render. Change it to intel_cmds_info to emphasize that it
describes available commands on the platform. Change the field
name in intel_device_info and update related definitions to refer
to commands, not tiling.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Nidhi gupta authored 2 years ago and Bhanuprakash Modem committed 2 years ago

To optimize the test execution time on hardware and simulation,
limit the execution to two (first & last) pipes and 2 planes
(first & last).

This patch will also provide an option (command line flag '-e') to
execute on all pipes and planes.

Example: ./kms_plane_alpha_blend -e --run-subtest alpha-7efc

V2: Edited commit message (Bhanu)
V3: New function for simulation constraints (Kamil)
    Update commit message (Bhanu)
v4: Restrict the execution only on 2 pipes for
    real hardware aswell (Ankit)
v5: Provide extended option for plane also (Bhanu)
    Move pipe declaration inside fixture (Ankit)

Signed-off-by: Nidhi Gupta <nidhi1.gupta@intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Instead of clubbing all draw methods, have a separate subtest for
each draw method.

Fixes: 9e71c27c (tests/i915/kms_draw_crc: Convert tests to dynamic)
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

To optimize the test execution time, limit the execution to
two (first & last) pipes. This patch will also provide an
option (command line flag '--extended') to execute on all
pipes.

Example:
./kms_cursor_edge_walk --extended --run-subtest 64x64-left-edge

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Signed-off-by: Nidhi Gupta <nidhi1.gupta@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

Instead of clubbing all dynamic subtests, let's have an individual
subtest for each size & type.

Fixes: 54ff3199 (tests/kms_cursor_edge_walk: Convert tests to dynamic)
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

As we are using same function for cleanup, no need to do other
stuff, just return after unsetting the output to pipe.

V2: - New helper to unset output to pipe (Karthik)

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

Due to the more number of iterations, "modest-transition" tests are
getting timed out on pre-si CI. Reducing the number of iterations to
half can save a lot of execution time.

V2: - Separate patch for cleanup

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

Make the colored bars full height so that we can actually see
the async flip activity on every scanline, as opposed to just
being able to see it in the middle of the screen.

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Remeber to call igt_put_cairo_ctx() after rendering to make
sure the results actually end up in the framebuffer (in case
the rendering happens to a temporary buffer and there needs
to be a copy back at the end).

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add skeleton for adding invalid parameter tests and add
two tests which are expected to return -EINVAL or -ERANGE

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

Riana Tauro authored 2 years ago and Ashutosh Dixit committed 2 years ago

add a test that verifies the i915 pmu directory and
reads all the events

v2 : use igt_assert_eq instead of igt_assert
     check errno after loop (Umesh)

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Add CSV output mode.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Caleb Callaway <caleb.callaway@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

Internal cleanup only - the name text is more accurate given the output
can also go to a file.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Caleb Callaway <caleb.callaway@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

If output is redirected to a file, or a pipe, lets not repeat the headers
because that can usually mean user is trying to parse the data later and
so repeated headers are a hindrance.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Caleb Callaway <caleb.callaway@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

As RGB565 and XRGB2101010 formats are bit slow in pre-si, we can
ignore both the formats only on simulation to improve the execution
time.
Moved the check weather display support specific format-modifier
combination before starting dynamic tests, since to
avoid skip in igt_dynamic().

v2: update the skip format condition to
    (formats[format_idx] != DRM_FORMAT_XRGB8888)
    (Juha-Pekka)

v3: update commit message (Bhanu)

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Signed-off-by: Nidhi Gupta <nidhi1.gupta@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Add mechanism to add coexisting features with selective fetch
and add dynamic subtests for DSC as coexisting feature.

v2:
 - check dsc is enabled (Swati)
 - remove unused variables

Cc: Jeevan B <jeevan.b@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>

Handle setting output for pipe in prepare and remove separate setup_output.
Carry all test parameters in data structure

Cc: Jeevan B <jeevan.b@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jeevan B <jeevan.b@intel.com>

Swati2 Sharma authored 2 years ago and Kamil Konieczny committed 2 years ago

Test is renamed from basic-dsc to dsc-basic for consistency
with other subtest names.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>

As the test execution is taking more time on simulation, limit the
execution to two (first & last) pipes. This optimization is for
simulation only and hence there will be no impact on real hardware.

This patch will also provide an option (command line flag '-e') to
execute on all pipes.

Example: ./kms_pipe_crc_basic -e --run-subtest read-crc

V2: - Edited commit message (Bhanu)
V3: - New function for simulation constraints (Kamil)
    - Update commit message (Bhanu)
V4: - Fix checkpatch errors (Swati)

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Signed-off-by: Nidhi Gupta <nidhi1.gupta@intel.com>
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>

The LP6 bit in WM_DBG has become the SAGV bit on ADL+. Decode
it correctly.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the hand rolled display_ver>=11 checks with
a more descriptive helper.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_gen() is no longer useful for determining the display IP
version, switch over to intel_display_ver().

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dump the ARB_CTL registers on all skl+ platforms as well,
and decode the "FBC watermark disable" and "IPC enable"
bits from therein. Those at least are relevant for the
watermark state.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Knowing which planes are actually enabled is somewhat relevant
when debugging watermarks. Dump that information.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make the code a bit less magical by pulling the
"is this plane cursor?" check into helper.

v2: One more

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

On ivb FPGA_DBG contains the similar LP level sticky bits that
are present in WM_DBG on hsw+. Let's dump these out.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>