igt@i915_pm_rpm@universal-planes.*- incomplete - No warnings/errors
<6> [399.789179] [IGT] i915_pm_rpm: starting dynamic subtest plane-76
<7> [399.789242] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [399.801306] i915 0000:00:02.0: [drm:intel_runtime_resume [i915]] Resuming device
<7> [399.806313] i915 0000:00:02.0: [drm:bxt_disable_dc9 [i915]] Disabling DC9
<7> [399.806593] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 08 to 00
<7> [399.806874] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 00
<7> [399.807263] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [399.807579] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 50000 kHz, VCO 0 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<7> [399.807834] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Sanitizing cdclk programmed by pre-os
<7> [399.808246] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [399.809215] i915 0000:00:02.0: [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [399.809455] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 02
<7> [399.819210] i915 0000:00:02.0: [drm:intel_runtime_resume [i915]] Device resumed
<7> [399.819530] i915 0000:00:02.0: [drm:intel_runtime_suspend [i915]] Suspending device
<7> [399.820426] [drm:drm_mode_setcrtc] [CRTC:167:pipe B]
<7> [399.823521] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 02 to 00
<7> [399.824412] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY A Voltage/Process Info : 0.95V dot0
<7> [399.824632] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [399.824846] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY B Voltage/Process Info : 0.95V dot0
<7> [399.825058] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [399.825203] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x0
<7> [399.825444] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_1
<7> [399.825607] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY A Voltage/Process Info : 0.95V dot0
<7> [399.825781] i915 0000:00:02.0: [drm:bxt_enable_dc9 [i915]] Enabling DC9
<7> [399.825916] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 08
<7> [399.828891] i915 0000:00:02.0: [drm:intel_runtime_suspend [i915]] Device suspended
<7> [399.852412] i915 0000:00:02.0: [drm:intel_runtime_resume [i915]] Resuming device
<7> [399.857310] i915 0000:00:02.0: [drm:bxt_disable_dc9 [i915]] Disabling DC9
<7> [399.857509] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 08 to 00
<7> [399.857701] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 00
<7> [399.857958] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [399.858212] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 50000 kHz, VCO 0 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<7> [399.858440] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Sanitizing cdclk programmed by pre-os
<7> [399.858799] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [399.859639] i915 0000:00:02.0: [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [399.859873] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 02
<7> [399.868673] i915 0000:00:02.0: [drm:intel_runtime_resume [i915]] Device resumed
<7> [399.868867] i915 0000:00:02.0: [drm:intel_runtime_suspend [i915]] Suspending device
<7> [399.869645] [drm:drm_mode_setcrtc] [CRTC:236:pipe C]
<7> [399.871261] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:239:eDP-1]
<7> [399.872111] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 02 to 00
<7> [399.872270] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:238:DDI A/PHY A] MST support: port: no, sink: no, modparam: yes
<7> [399.872970] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY A Voltage/Process Info : 0.95V dot0
<7> [399.873051] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000, 648000, 810000
<7> [399.873228] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [399.873272] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
<7> [399.873465] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY B Voltage/Process Info : 0.95V dot0
Edited by Ravi V