igt@i915_selftest@live@slpc - incomplete - No warnings/errors
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11716/bat-jsl-2/igt@i915_selftest@live@slpc.html
<6> [826.051196] [IGT] i915_selftest: starting dynamic subtest slpc
<5> [826.197711] Setting dangerous option live_selftests - tainting kernel
<7> [826.298824] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] WOPCM: 2048K
<7> [826.299411] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] enable_guc=0 (guc:no submission:no huc:no slpc:no)
<7> [826.299762] i915 0000:00:02.0: [drm:intel_pch_type [i915]] Found Jasper Lake PCH
<7> [826.300010] i915 0000:00:02.0: [drm:intel_power_domains_init [i915]] Allowed DC state mask 0a
<7> [826.300634] i915 0000:00:02.0: [drm:intel_uncore_init_mmio [i915]] unclaimed mmio detected on uncore init, clearing
<7> [826.300979] i915 0000:00:02.0: [drm:intel_device_info_runtime_init [i915]] rawclk rate: 19200 kHz
<7> [826.301882] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vdbox enable: 0001, instances: 0001
<7> [826.302114] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vebox enable: 0001, instances: 0001
<7> [826.302874] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [826.303107] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
<7> [826.303336] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] DSM size = 60M
<6> [826.303565] i915 0000:00:02.0: [drm] VT-d active for gfx access
<6> [826.303663] i915 0000:00:02.0: vgaarb: deactivate vga console
<6> [826.304326] i915 0000:00:02.0: [drm] Using Transparent Hugepages
<7> [826.304363] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x000000007fa000c7
<7> [826.304651] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 61440K, usable: 59392K
<7> [826.305262] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x76f06018
<7> [826.305625] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ACPI OpRegion version 2.1.0
<7> [826.305895] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [826.306142] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] SWSCI Mailbox #2 present for opregion v2.x
<7> [826.306390] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] SWSCI supported
<7> [826.316459] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583
<7> [826.316765] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE supported
<7> [826.317008] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [826.317246] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
<7> [826.317486] i915 0000:00:02.0: [drm:skl_get_dram_info [i915]] DRAM type: DDR4
<7> [826.317720] i915 0000:00:02.0: [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM L size: 128 Gb, width: X8, ranks: 2, 16Gb DIMMs: no
<7> [826.317944] i915 0000:00:02.0: [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM S size: 0 Gb, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [826.318182] i915 0000:00:02.0: [drm:skl_dram_get_channel_info [i915]] CH0 ranks: 2, 16Gb DIMMs: no
<7> [826.318417] i915 0000:00:02.0: [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM L size: 128 Gb, width: X8, ranks: 2, 16Gb DIMMs: no
<7> [826.318663] i915 0000:00:02.0: [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM S size: 0 Gb, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [826.318874] i915 0000:00:02.0: [drm:skl_dram_get_channel_info [i915]] CH1 ranks: 2, 16Gb DIMMs: no
<7> [826.319080] i915 0000:00:02.0: [drm:skl_get_dram_info [i915]] Memory configuration is symmetric? yes
<7> [826.319391] i915 0000:00:02.0: [drm:intel_dram_detect [i915]] DRAM channels: 2
<7> [826.319625] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] Watermark level 0 adjustment needed: no
<7> [826.319846] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.9 [i915]] QGV 0: DCLK=2134 tRP=15 tRDPRE=8 tRAS=35 tRCD=15 tRC=50
<7> [826.320122] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.9 [i915]] QGV 1: DCLK=2934 tRP=21 tRDPRE=12 tRAS=47 tRCD=21 tRC=68
<7> [826.320382] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.9 [i915]] QGV 2: DCLK=2401 tRP=17 tRDPRE=9 tRAS=39 tRCD=17 tRC=56
<7> [826.320655] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW0 / QGV 0: num_planes=4 deratedbw=9834
<7> [826.320925] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW0 / QGV 1: num_planes=4 deratedbw=9941
<7> [826.321203] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW0 / QGV 2: num_planes=4 deratedbw=9878
<7> [826.321482] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW1 / QGV 0: num_planes=2 deratedbw=14899
<7> [826.321769] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW1 / QGV 1: num_planes=2 deratedbw=16488
<7> [826.322027] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW1 / QGV 2: num_planes=2 deratedbw=15583
<7> [826.322285] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW2 / QGV 0: num_planes=1 deratedbw=20069
<7> [826.322538] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW2 / QGV 1: num_planes=1 deratedbw=23719
<7> [826.322800] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW2 / QGV 2: num_planes=1 deratedbw=21483
<7> [826.323052] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW3 / QGV 0: num_planes=1 deratedbw=24280
<7> [826.323323] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW3 / QGV 1: num_planes=1 deratedbw=25000
<7> [826.323632] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW3 / QGV 2: num_planes=1 deratedbw=25000
<7> [826.323912] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW4 / QGV 0: num_planes=1 deratedbw=25000
<7> [826.324159] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW4 / QGV 1: num_planes=1 deratedbw=25000
<7> [826.324408] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW4 / QGV 2: num_planes=1 deratedbw=25000
<7> [826.324686] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW5 / QGV 0: num_planes=1 deratedbw=25000
<7> [826.324936] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW5 / QGV 1: num_planes=1 deratedbw=25000
<7> [826.325177] i915 0000:00:02.0: [drm:icl_get_bw_info.constprop.8 [i915]] BW5 / QGV 2: num_planes=1 deratedbw=25000
<7> [826.326042] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
<7> [826.326333] i915 0000:00:02.0: [drm:intel_bios_init [i915]] VBT signature "$VBT JASPERLAKE ", BDB version 228
<7> [826.326630] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 1 (size 5, min size 7)
<7> [826.326895] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 2 (size 356, min size 5)
<7> [826.327153] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 9 (size 96, min size 100)
<7> [826.327406] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 12 (size 19, min size 19)
<7> [826.327678] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 27 (size 780, min size 298)
<7> [826.327931] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 40 (size 30, min size 30)
<7> [826.328192] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 41 (size 148, min size 148)
<7> [826.328483] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 42 (size 1298, min size 1366)
<7> [826.328796] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 43 (size 129, min size 273)
<7> [826.329066] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 44 (size 54, min size 58)
<7> [826.329316] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 52 (size 822, min size 792)
<7> [826.329563] i915 0000:00:02.0: [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
<7> [826.329825] i915 0000:00:02.0: [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
<7> [826.330071] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x1806
<7> [826.330316] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x60d6
<7> [826.330568] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x60d2
<7> [826.330866] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Skipping SDVO device mapping
<7> [826.331136] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port A VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:1 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [826.331393] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port A VBT HDMI level shift: 0
<7> [826.331648] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port A VBT DP max link rate: 810000
<7> [826.331896] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port B VBT info: CRT:0 DVI:1 HDMI:1 DP:1 eDP:0 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [826.332142] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port B VBT HDMI level shift: 0
<7> [826.332375] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port B VBT DP max link rate: 810000
<7> [826.332623] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port C VBT info: CRT:0 DVI:1 HDMI:1 DP:0 eDP:0 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [826.332870] i915 0000:00:02.0: [drm:intel_bios_init [i915]] port C trying to use the same DDC pin (0x3) as port A, disabling port A DVI/HDMI support
<7> [826.333133] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port C VBT HDMI level shift: 0
<7> [826.333399] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port C VBT DP max link rate: 810000
<7> [826.333702] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 00
<7> [826.334014] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY A Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.334290] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [826.334554] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY B Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.334844] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [826.335098] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY C Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.335346] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY C already enabled, won't reprogram it.
<7> [826.335716] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [826.336045] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<7> [826.336321] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [826.336735] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling always-on
<7> [826.336988] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [826.337236] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.15 [i915]] Setting DC state from 00 to 00
<7> [826.337520] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY A Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.337800] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [826.338061] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY B Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.338336] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [826.338627] i915 0000:00:02.0: [drm:icl_verify_procmon_ref_values [i915]] Combo PHY C Voltage/Process Info : 0.85V dot0 (low-voltage)
<7> [826.338900] i915 0000:00:02.0: [drm:icl_combo_phys_init [i915]] Combo PHY C already enabled, won't reprogram it.
<7> [826.339144] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [826.339400] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_3
<7> [826.339783] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_4
<7> [826.340170] i915 0000:00:02.0: [drm:intel_dmc_ucode_init [i915]] Loading i915/icl_dmc_ver1_09.bin
<6> [826.342241] i915 0000:00:02.0: [drm] Finished loading DMC firmware i915/icl_dmc_ver1_09.bin (v1.9)
<7> [826.342254] i915 0000:00:02.0: [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [826.343173] i915 0000:00:02.0: [drm:intel_init_pm [i915]] SAGV supported: yes, original SAGV block time: 10 us
<7> [826.343430] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
<7> [826.343694] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
<7> [826.343915] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
<7> [826.344130] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
<7> [826.344336] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
<7> [826.344530] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
<7> [826.344747] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
<7> [826.344950] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
<7> [826.349682] i915 0000:00:02.0: [drm:intel_modeset_init_nogem [i915]] 3 display pipes available.
<7> [826.355707] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<7> [826.356123] i915 0000:00:02.0: [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 556800 kHz
<7> [826.356394] i915 0000:00:02.0: [drm:intel_modeset_init_nogem [i915]] Max dotclock rate: 1113600 kHz
<7> [826.356729] i915 0000:00:02.0: [drm:intel_bios_port_aux_ch [i915]] using AUX A for port A (VBT)
<7> [826.357028] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding eDP connector on [ENCODER:238:DDI A/PHY A]
<7> [826.357483] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] bios t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 6000
<7> [826.357789] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] spec t1_t3 2100 t8 500 t9 500 t10 5000 t11_t12 6100
<7> [826.358052] i915 0000:00:02.0: [drm:pps_init_delays [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [826.358311] i915 0000:00:02.0: [drm:pps_init_delays [i915]] backlight on delay 1, off delay 1
<7> [826.358696] i915 0000:00:02.0: [drm:pps_init_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [826.359027] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX_A
<7> [826.359508] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] Turning [ENCODER:238:DDI A/PHY A] VDD on
<7> [826.359826] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [826.976825] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
<7> [826.977144] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [826.977489] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000068
<7> [826.977816] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:238:DDI A/PHY A] panel power wasn't enabled
<7> [827.185716] i915 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX A/DDI A/PHY A: DPCD: 12 0a 82 41 00 00 01 80 02 00 00 00 0f 0b 00
<7> [827.186321] i915 0000:00:02.0: [drm:drm_dp_read_desc [drm_display_helper]] AUX A/DDI A/PHY A: DP sink: OUI 00-1c-f8 dev-ID HW-rev 0.0 SW-rev 1.22 quirks 0x0000
<7> [827.186872] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] eDP DPCD: 02 8a 81
<7> [827.187713] i915 0000:00:02.0: [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR version 1
<7> [827.194651] [drm:update_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [827.194687] [drm:update_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [827.194694] [drm:drm_add_edid_modes] ELD monitor
<7> [827.194699] [drm:drm_add_edid_modes] ELD size 20, SAD count 0
<7> [827.194730] [drm:update_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [827.199622] i915 0000:00:02.0: [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
<7> [827.199926] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel type (VBT): 2
<7> [827.200201] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel type (fallback): 0
<7> [827.200470] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Selected panel type (VBT): 2
<7> [827.200771] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] DRRS supported mode is seamless
<7> [827.201090] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Found panel mode in BIOS VBT legacy lfp table: "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
<7> [827.201372] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT initial LVDS value 300
<7> [827.201673] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Seamless DRRS min refresh rate: 0 Hz
<7> [827.201940] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 6, level 255, controller 0
<7> [827.202206] i915 0000:00:02.0: [drm:intel_panel_add_edid_fixed_modes [i915]] [CONNECTOR:239:eDP-1] using preferred EDID fixed mode: "1920x1080": 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
<7> [827.202468] i915 0000:00:02.0: [drm:intel_dp_wait_source_oui [i915]] Performing OUI wait
<7> [827.221177] i915 0000:00:02.0: [drm:intel_panel_init [i915]] [CONNECTOR:239:eDP-1] DRRS type: none
<7> [827.221727] i915 0000:00:02.0: [drm:intel_backlight_setup [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/96000
<7> [827.222280] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] bios t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 6000
<7> [827.222548] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
<7> [827.222821] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] spec t1_t3 2100 t8 500 t9 500 t10 5000 t11_t12 6100
<7> [827.223251] i915 0000:00:02.0: [drm:pps_init_delays [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [827.223501] i915 0000:00:02.0: [drm:pps_init_delays [i915]] backlight on delay 1, off delay 200
<7> [827.223885] i915 0000:00:02.0: [drm:pps_init_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [827.224781] i915 0000:00:02.0: [drm:intel_bios_port_aux_ch [i915]] using AUX B for port B (VBT)
<7> [827.225076] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:247:DDI B/PHY B]
<7> [827.225786] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] PSR condition failed: Port not supported
<7> [827.226058] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on [ENCODER:247:DDI B/PHY B]
<7> [827.226302] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x2 for port B (VBT)
<7> [827.226818] i915 0000:00:02.0: [drm:intel_bios_port_aux_ch [i915]] using AUX C for port C (platform default)
<7> [827.227112] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on [ENCODER:262:DDI C (TC)/PHY C]
<7> [827.227366] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x3 for port C (VBT)
<7> [827.227754] i915 0000:00:02.0: [drm:intel_modeset_init_nogem [i915]] VBT says port D is not present
<7> [827.228762] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CRTC:98:pipe A] hw state readout: disabled
<7> [827.229152] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CRTC:167:pipe B] hw state readout: disabled
<7> [827.229523] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CRTC:236:pipe C] hw state readout: disabled
<7> [827.229857] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:31:plane 1A] hw state readout: disabled, pipe A
<7> [827.230150] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:40:plane 2A] hw state readout: disabled, pipe A
<7> [827.230432] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:49:plane 3A] hw state readout: disabled, pipe A
<7> [827.230739] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:58:plane 4A] hw state readout: disabled, pipe A
<7> [827.231019] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:67:plane 5A] hw state readout: disabled, pipe A
<7> [827.231280] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:76:plane 6A] hw state readout: disabled, pipe A
<7> [827.231549] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:85:plane 7A] hw state readout: disabled, pipe A
<7> [827.231837] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:94:cursor A] hw state readout: disabled, pipe A
<7> [827.232107] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:100:plane 1B] hw state readout: disabled, pipe B
<7> [827.232370] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:109:plane 2B] hw state readout: disabled, pipe B
<7> [827.232650] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:118:plane 3B] hw state readout: disabled, pipe B
<7> [827.232918] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:127:plane 4B] hw state readout: disabled, pipe B
<7> [827.233196] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:136:plane 5B] hw state readout: disabled, pipe B
<7> [827.233484] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:145:plane 6B] hw state readout: disabled, pipe B
<7> [827.233864] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:154:plane 7B] hw state readout: disabled, pipe B
<7> [827.234140] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:163:cursor B] hw state readout: disabled, pipe B
<7> [827.234405] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:169:plane 1C] hw state readout: disabled, pipe C
<7> [827.234700] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:178:plane 2C] hw state readout: disabled, pipe C
<7> [827.234965] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:187:plane 3C] hw state readout: disabled, pipe C
<7> [827.235222] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:196:plane 4C] hw state readout: disabled, pipe C
<7> [827.235487] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:205:plane 5C] hw state readout: disabled, pipe C
<7> [827.235772] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:214:plane 6C] hw state readout: disabled, pipe C
<7> [827.236037] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:223:plane 7C] hw state readout: disabled, pipe C
<7> [827.236311] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:232:cursor C] hw state readout: disabled, pipe C
<7> [827.236631] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:238:DDI A/PHY A] hw state readout: disabled, pipe A
<7> [827.236922] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:247:DDI B/PHY B] hw state readout: disabled, pipe A
<7> [827.237171] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:249:DP-MST A] hw state readout: disabled, pipe A
<7> [827.237420] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:250:DP-MST B] hw state readout: disabled, pipe B
<7> [827.237697] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:251:DP-MST C] hw state readout: disabled, pipe C
<7> [827.237960] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:262:DDI C (TC)/PHY C] hw state readout: disabled, pipe A
<7> [827.238226] i915 0000:00:02.0: [drm:intel_dpll_readout_hw_state [i915]] DPLL 0 hw state readout: pipe_mask 0x0, on 0
<7> [827.238492] i915 0000:00:02.0: [drm:intel_dpll_readout_hw_state [i915]] DPLL 1 hw state readout: pipe_mask 0x0, on 0
<7> [827.238785] i915 0000:00:02.0: [drm:intel_dpll_readout_hw_state [i915]] DPLL 4 hw state readout: pipe_mask 0x0, on 0
<7> [827.239123] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:239:eDP-1] hw state readout: disabled
<7> [827.239420] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:248:DP-1] hw state readout: disabled
<7> [827.239742] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:257:HDMI-A-1] hw state readout: disabled
<7> [827.240035] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:263:HDMI-A-2] hw state readout: disabled
<7> [827.240289] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:31:plane 1A] min_cdclk 0 kHz
<7> [827.240535] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:40:plane 2A] min_cdclk 0 kHz
<7> [827.240846] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:49:plane 3A] min_cdclk 0 kHz
<7> [827.241097] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:58:plane 4A] min_cdclk 0 kHz
<7> [827.241343] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:67:plane 5A] min_cdclk 0 kHz
<7> [827.241609] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:76:plane 6A] min_cdclk 0 kHz
<7> [827.241859] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:85:plane 7A] min_cdclk 0 kHz
<7> [827.242102] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:94:cursor A] min_cdclk 0 kHz
<7> [827.242345] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] pipe A data rate 0 num active planes 0
<7> [827.242632] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:100:plane 1B] min_cdclk 0 kHz
<7> [827.242897] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:109:plane 2B] min_cdclk 0 kHz
<7> [827.243167] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:118:plane 3B] min_cdclk 0 kHz
<7> [827.243437] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:127:plane 4B] min_cdclk 0 kHz
<7> [827.243718] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:136:plane 5B] min_cdclk 0 kHz
<7> [827.243974] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:145:plane 6B] min_cdclk 0 kHz
<7> [827.244221] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:154:plane 7B] min_cdclk 0 kHz
<7> [827.244461] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:163:cursor B] min_cdclk 0 kHz
<7> [827.244736] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] pipe B data rate 0 num active planes 0
<7> [827.244987] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:169:plane 1C] min_cdclk 0 kHz
<7> [827.245229] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:178:plane 2C] min_cdclk 0 kHz
<7> [827.245469] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:187:plane 3C] min_cdclk 0 kHz
<7> [827.245749] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:196:plane 4C] min_cdclk 0 kHz
<7> [827.246026] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:205:plane 5C] min_cdclk 0 kHz
<7> [827.246290] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:214:plane 6C] min_cdclk 0 kHz
<7> [827.246546] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:223:plane 7C] min_cdclk 0 kHz
<7> [827.246819] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] [PLANE:232:cursor C] min_cdclk 0 kHz
<7> [827.247069] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state [i915]] pipe C data rate 0 num active planes 0
<7> [827.275656] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:98:pipe A] enable: no [setup_hw_state]
<7> [827.275966] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:167:pipe B] enable: no [setup_hw_state]
<7> [827.276231] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:236:pipe C] enable: no [setup_hw_state]
<7> [827.276771] i915 0000:00:02.0: [drm:skl_wm_get_hw_state [i915]] [CRTC:98:pipe A] dbuf slices 0x0, ddb (0 - 0), active pipes 0x0, mbus joined: no
<7> [827.277263] i915 0000:00:02.0: [drm:skl_wm_get_hw_state [i915]] [CRTC:167:pipe B] dbuf slices 0x0, ddb (0 - 0), active pipes 0x0, mbus joined: no
<7> [827.277749] i915 0000:00:02.0: [drm:skl_wm_get_hw_state [i915]] [CRTC:236:pipe C] dbuf slices 0x0, ddb (0 - 0), active pipes 0x0, mbus joined: no
<7> [827.278221] i915 0000:00:02.0: [drm:i915_init_ggtt [i915]] Reserved GGTT:[0, 1000] for use by error capture
<7> [827.278445] i915 0000:00:02.0: [drm:i915_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]