Black screen on X1 Carbon 4th Gen with DP montior on OneLink+ dock
So, I just had one of my external monitors not turn back on after a DPMS OFF. This seems to be stuck, i.e. even turning it off explicitly and then trying to turn it back on does not help (i.e. through mutter/wayland configuration or DPMS off on all ports).
Full dmesg, I runtime set drm.debug to 0xe and then tried to turn on the monitor again. I have three monitors connected (internal + Dell 25" + Dell 24"), the 24" monitor did not turn on again. The 25" monitor is connected directly through mDP while the 24" one is connected through the OneLink+ docking station.
Kernel: Linux ben-x1 5.4.7-200.fc31.x86_64 #1 SMP Tue Dec 31 22:25:12 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux
The relevant part seems to be:
[672872.149652] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb ( 0 - 358) -> ( 0 - 0), size 358 -> 0
[672872.149723] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
[672872.149776] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] lines 0, 3, 3, 4, 6, 7, 7, 8, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.149827] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] blocks 20, 40, 47, 54, 88, 104, 107, 122, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.149877] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb 21, 41, 48, 55, 89, 105, 108, 123, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.172422] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] ddb ( 382 - 862) -> ( 0 - 0), size 480 -> 0
[672872.172484] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
[672872.172541] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] lines 0, 4, 4, 5, 7, 9, 9, 11, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.172596] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] blocks 34, 67, 82, 91, 142, 176, 182, 218, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.172651] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] min_ddb 35, 68, 83, 92, 143, 177, 183, 219, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
[672872.411784] [drm:drm_mode_addfb2 [drm]] [FB:114]
[672872.411859] [drm:drm_mode_setcrtc [drm]] [CRTC:66:pipe B]
[672872.411875] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:113:DP-8]
[672872.411933] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] ddb ( 0 - 0) -> ( 382 - 862), size 0 -> 480
[672872.411950] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] level wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
[672872.411970] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] lines 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 0, 4, 4, 5, 7, 9, 9, 11, 0
[672872.411993] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] blocks 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 34, 67, 82, 91, 142, 176, 182, 218, 0
[672872.412008] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] min_ddb 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 35, 68, 83, 92, 143, 177, 183, 219, 0
[672872.426663] [drm:drm_mode_addfb2 [drm]] [FB:200]
[672872.426732] [drm:drm_mode_setcrtc [drm]] [CRTC:84:pipe C]
[672872.426745] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:194:DP-5]
[672872.426804] [drm:intel_atomic_check [i915]] [CONNECTOR:194:DP-5] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36
[672872.426836] [drm:intel_atomic_check [i915]] hw max bpp: 24, pipe bpp: 24, dithering: 0
[672872.426861] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 1920)
[672872.426888] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 2200)
[672872.426911] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 1920)
[672872.426932] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 2200)
[672872.426952] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 2008)
[672872.427020] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 2052)
[672872.427039] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 1080)
[672872.427059] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 1125)
[672872.427078] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 1080)
[672872.427098] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 1125)
[672872.427117] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 1084)
[672872.427136] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 1089)
[672872.427161] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.flags (1) (expected 0, found 1)
[672872.427180] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.flags (4) (expected 0, found 4)
[672872.427200] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_clock (expected 0, found 148500)
[672872.427224] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
[672872.427245] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 1, actual 1
[672872.427273] [drm:intel_find_shared_dpll [i915]] [CRTC:84:pipe C] allocated DPLL 2
[672872.427295] [drm:intel_reference_shared_dpll.isra.0 [i915]] using DPLL 2 for pipe C
[672872.427324] [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] ddb ( 358 - 382) -> ( 243 - 267), size 24 -> 24
[672872.427340] [drm:skl_compute_wm [i915]] [PLANE:49:plane 1B] ddb ( 382 - 862) -> ( 267 - 594), size 480 -> 327
[672872.427354] [drm:skl_compute_wm [i915]] [PLANE:63:cursor B] ddb ( 862 - 892) -> ( 594 - 624), size 30 -> 30
[672872.427369] [drm:skl_compute_wm [i915]] [PLANE:67:plane 1C] ddb ( 0 - 0) -> ( 624 - 868), size 0 -> 244
[672872.427383] [drm:skl_compute_wm [i915]] [PLANE:81:cursor C] ddb ( 0 - 0) -> ( 868 - 892), size 0 -> 24
[672872.427398] [drm:skl_compute_wm [i915]] [PLANE:67:plane 1C] level wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
[672872.427420] [drm:skl_compute_wm [i915]] [PLANE:67:plane 1C] lines 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 0, 3, 3, 4, 6, 7, 7, 8, 0
[672872.427435] [drm:skl_compute_wm [i915]] [PLANE:67:plane 1C] blocks 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 21, 42, 47, 57, 92, 107, 107, 122, 0
[672872.427449] [drm:skl_compute_wm [i915]] [PLANE:67:plane 1C] min_ddb 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 22, 43, 48, 58, 93, 108, 108, 123, 0
[672872.427471] [drm:intel_dump_pipe_config [i915]] [CRTC:84:pipe C] enable: yes [modeset]
[672872.427493] [drm:intel_dump_pipe_config [i915]] active: yes, output_types: DP_MST (0x800), output format: RGB
[672872.427514] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
[672872.427534] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 3460300, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 14
[672872.427554] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x0
[672872.427574] [drm:intel_dump_pipe_config [i915]] requested mode:
[672872.427585] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[672872.427605] [drm:intel_dump_pipe_config [i915]] adjusted mode:
[672872.427615] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[672872.427639] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
[672872.427695] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 148500
[672872.427728] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
[672872.427761] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no
[672872.427793] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
[672872.427827] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
[672872.427858] [drm:intel_dump_pipe_config [i915]] [PLANE:67:plane 1C] fb: [FB:200] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
[672872.427888] [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1
[672872.427926] [drm:intel_dump_pipe_config [i915]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
[672872.427966] [drm:intel_dump_pipe_config [i915]] [PLANE:74:plane 2C] fb: [NOFB], visible: no
[672872.427996] [drm:intel_dump_pipe_config [i915]] [PLANE:81:cursor C] fb: [NOFB], visible: no
[672872.439751] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DDI A]
[672872.439934] [drm:intel_atomic_commit_tail [i915]] [ENCODER:91:DDI B]
[672872.440046] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DP-MST A]
[672872.440173] [drm:intel_atomic_commit_tail [i915]] [ENCODER:94:DP-MST B]
[672872.440274] [drm:intel_atomic_commit_tail [i915]] [ENCODER:95:DP-MST C]
[672872.440405] [drm:intel_atomic_commit_tail [i915]] [ENCODER:104:DDI C]
[672872.440490] [drm:intel_atomic_commit_tail [i915]] [ENCODER:106:DP-MST A]
[672872.440592] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DP-MST B]
[672872.440676] [drm:intel_atomic_commit_tail [i915]] [ENCODER:108:DP-MST C]
[672872.440791] [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 0
[672872.440900] [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 1
[672872.440988] [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 2
[672872.441090] [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 3
[672872.456297] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 4, on? 0) for crtc 84
[672872.456388] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
[672872.456572] [drm:intel_mst_pre_enable_dp [i915]] active links 0
[672872.458152] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
[672872.458252] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
[672872.458366] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
[672872.458912] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
[672872.459535] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
[672872.460157] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 00 00
[672872.460259] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 0a
[672872.460364] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
[672872.460957] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
[672872.461036] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
[672872.461111] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
[672872.461186] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
[672872.477907] [drm:intel_dp_start_link_train [i915]] clock recovery OK
[672872.477960] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
[672872.494669] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
[672872.495784] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:105:DP-2] Link Training Passed at Link Rate = 270000, Lane count = 4
[672872.495969] [drm:drm_dp_mst_allocate_vcpi [drm_kms_helper]] initing vcpi for pbn=532 slots=14
[672872.496666] [drm:intel_enable_pipe [i915]] enabling pipe C
[672872.497066] [drm:intel_mst_enable_dp [i915]] active links 1
[672872.497430] [drm:drm_dp_update_payload_part2 [drm_kms_helper]] payload 0 1
[672872.498911] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
[672872.498938] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
[672872.499045] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
[672872.499502] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
[672872.500584] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 00 00
[672872.500607] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
[672872.513936] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe C FIFO underrun
[672872.514002] [drm:verify_connector_state [i915]] [CONNECTOR:194:DP-5]
[672872.514064] [drm:intel_atomic_commit_tail [i915]] [CRTC:84:pipe C]
[672872.514138] [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 2
[672872.524960] [drm:drm_mode_addfb2 [drm]] [FB:208]
[672872.525093] [drm:drm_mode_setcrtc [drm]] [CRTC:48:pipe A]
[672872.525125] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:86:eDP-1]
[672872.525251] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb ( 0 - 0) -> ( 0 - 243), size 0 -> 243
[672872.525293] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] level wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
[672872.525333] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] lines 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 0, 3, 3, 4, 6, 7, 7, 8, 0
[672872.525377] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] blocks 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 20, 40, 47, 54, 88, 104, 107, 122, 0
[672872.525415] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 21, 41, 48, 55, 89, 105, 108, 123, 0
[672872.590881] [drm:drm_mode_addfb2 [drm]] [FB:202]
Edited by Benjamin Berg