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  11. Dec 05, 2011
  12. Nov 28, 2011
  13. Nov 27, 2011
  14. Nov 22, 2011
    • Lina Versace's avatar
      intel: Fix separate stencil in builtin DRI2 backend · 2a455665
      Lina Versace authored
      
      intelAllocateBuffer() was oblivious to separate stencil buffers.  This
      patch fixes it to allocate a non-tiled stencil buffer with special pitch,
      just as the DDX does.
      
      Without this, any app that attempted to create an EGL surface with stencil
      bits would crash. Of course, this affected only environments that used the
      builtin DRI2 backend, such as Android and Wayland.
      
      Fixes GLBenchmark2.1 on Android on gen7.
      
      Note: This is a candidate for the 7.11 branch.
      Tested-by: default avatarLouie Tsaie <louie.tsai@intel.com>
      Signed-off-by: default avatarChad Versace <chad.versace@linux.intel.com>
      (cherry picked from commit 79653c12)
      
      Conflicts:
      
      	src/mesa/drivers/dri/intel/intel_screen.c
      2a455665
    • Lina Versace's avatar
      intel: Fix region dimensions for stencil buffers received from DDX · 68060d6b
      Lina Versace authored
      
      I changed the dimensions of the stencil buffer's region, as allocated by
      the DDX, at xf86-video-intel commit
         commit 3e55f3e88b40471706d5cd45c4df4010f8675c75
         dri: Do not tile stencil buffer
      But I forgot to make the analogous update to the Intel DRI2 glue in Mesa.
      This patch makes that update.
      
      Surprisingly, the mismatch did not cause any bugs. But the mismatch, if
      left unfixed, *would* create bugs in the next commit.
      
      Note: This is a candidate for the 7.11 branch.
      Signed-off-by: default avatarChad Versace <chad.versace@linux.intel.com>
      (cherry picked from commit 50b33560)
      68060d6b
    • Lina Versace's avatar
      intel: Simplify stencil detiling arithmetic · fd35fab3
      Lina Versace authored
      
      When calculating the y offset needed for detiling window system stencil
      buffers, replace the term
         region->height * 2 + region->height % 2 - 1
      with
         rb->Height - 1 .
      
      The two terms are incidentally equivalent due to some out-of-date,
      incorrect code in the Intel DRI2 glue for DDX. (See
      intel_process_dri2_buffer_with_separate_stencil(), line ``buffer_height /=
      2;``).
      
      Note: This is a candidate for the 7.11 branch (only the intel_span.c hunk).
      Signed-off-by: default avatarChad Versace <chad.versace@linux.intel.com>
      (cherry picked from commit dc4c3a31)
      
      Conflicts:
      
      	src/mesa/drivers/dri/intel/intel_fbo.c
      	src/mesa/drivers/dri/intel/intel_span.c
      fd35fab3
  15. Nov 21, 2011
  16. Nov 18, 2011
  17. Nov 17, 2011
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