- Jul 18, 2023
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Guchun Chen authored
file_priv needs to be setup firstly, otherwise, root PD will always be allocated on partition 0, even if opening the device from other partitions. Fixes: 3ebfd221 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jun 30, 2023
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Alex Deucher authored
So we can selectively enable it on certain devices. No intended functional change. Reviewed-and-tested-by:
Jiadong Zhu <Jiadong.Zhu@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jun 09, 2023
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Lang Yu authored
Root PD BO should be reserved before unmap and remove a bo_va from VM otherwise lockdep will complain. v2: check fpriv->csa_va is not NULL instead of amdgpu_mcbp (christian) [14616.936827] WARNING: CPU: 6 PID: 1711 at drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1762 amdgpu_vm_bo_del+0x399/0x3f0 [amdgpu] [14616.937096] Call Trace: [14616.937097] <TASK> [14616.937102] amdgpu_driver_postclose_kms+0x249/0x2f0 [amdgpu] [14616.937187] drm_file_free+0x1d6/0x300 [drm] [14616.937207] drm_close_helper.isra.0+0x62/0x70 [drm] [14616.937220] drm_release+0x5e/0x100 [drm] [14616.937234] __fput+0x9f/0x280 [14616.937239] ____fput+0xe/0x20 [14616.937241] task_work_run+0x61/0x90 [14616.937246] exit_to_user_mode_prepare+0x215/0x220 [14616.937251] syscall_exit_to_user_mode+0x2a/0x60 [14616.937254] do_syscall_64+0x48/0x90 [14616.937257] entry_SYSCALL_64_after_hwframe+0x63/0xcd Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Su Hui authored
No need cast (void*) to (struct amdgpu_device *). Signed-off-by:
Su Hui <suhui@nfschina.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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PhilipY authored
If xcp_mgr is initialized, add mem_id to amdgpu_vm structure to store memory partition number when creating amdgpu_vm for the xcp. The xcp number is decided when opening the render device, for example /dev/dri/renderD129 is xcp_id 0, /dev/dri/renderD130 is xcp_id 1. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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James Zhu authored
Find partition ID when open device from render device minor. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-and-tested-by:
Philip <Yang<Philip.Yang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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James Zhu authored
Add multiple jpeg rings support. Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Apr 24, 2023
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Alex Deucher authored
Use the new callback to fetch the data. Return an error if not supported. UMDs should use this query to check whether shadow buffers are supported and if so what size they should be. v2: return an error rather than a zerod structure. v3: drop GDS, move into dev_info structure. Data will be 0 if not supported. v4: drop local variable r Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Apr 21, 2023
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SRINIVASAN SHANMUGAM authored
Fix the following errors reported by checkpatch: ERROR: space prohibited before open square bracket '[' +#define TA_FW_NAME(type) [TA_FW_TYPE_PSP_##type] = #type ERROR: code indent should use tabs where possible + query_fw.fw_type = AMDGPU_INFO_FW_GFX_RLCV;$ Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Apr 18, 2023
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Bas Nieuwenhuizen authored
This info would be used by radv to figure out when we need to split a submission into multiple submissions. radv currently has a limit of 192 which seems to work for most gfx submissions, but is way too high for e.g. compute or sdma. Userspace is available at https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3 v3: Completely rewrote based on suggestion of making it a separate query. Link: drm/amd#2498 Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Feb 23, 2023
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Marek Olšák authored
AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD: important for conformance on gfx11 Other fields are exposed from IP discovery. enabled_rb_pipes_mask_hi is added for future chips, currently 0. Mesa MR: mesa/mesa!21403 Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jan 19, 2023
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Marek Olšák authored
For computing PCIe bandwidth in userspace and troubleshooting PCIe bandwidth issues. Note that this intentionally fills holes and padding in drm_amdgpu_info_device. Mesa MR: mesa/mesa!20790 Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Dec 15, 2022
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Evan Quan authored
Otherwise, some UMD tools will treate them as 0 at default while actually they are not. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Expose those informations to UMD who need them as for standard profiling mode. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Nov 29, 2022
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Konstantin Meskhidze authored
This commit fixes logic error in function 'amdgpu_hw_ip_info': - value 'uvd' might be 'vcn'. Signed-off-by:
Konstantin Meskhidze <konstantin.meskhidze@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Nov 05, 2022
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Thomas Zimmermann authored
Remove include statements for <drm/drm_fb_helper.h> where it is not required (i.e., most of them). In a few places include other header files that are required by the source code. v3: * fix amdgpu include statements * fix rockchip include statements Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221103151446.2638-23-tzimmermann@suse.de
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- Nov 04, 2022
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Yiqing Yao authored
[why] Start from soc21, CP does not support MCBP, so disable it. [how] Used amgpu_mcbp flag alone instead of checking if is in SRIOV to enable/disable MCBP. Only set flag to enable on asic_type prior to soc21 in SRIOV. Signed-off-by:
Yiqing Yao <yiqing.yao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Nov 02, 2022
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Graham Sider authored
Use mes.sched_version, mes.kiq_version for debugfs as mes.ucode_fw_version does not contain correct versioning information. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Reviewed-by:
Jack Xiao <Jack.Xiao@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Oct 27, 2022
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Graham Sider authored
Use mes.sched_version, mes.kiq_version for debugfs as mes.ucode_fw_version does not contain correct versioning information. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Reviewed-by:
Jack Xiao <Jack.Xiao@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Oct 24, 2022
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David Francis authored
IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
David Francis <David.Francis@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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David Francis authored
IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
David Francis <David.Francis@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Sep 19, 2022
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zhang yifan authored
This patch addes MES and MES-KIQ version in debugfs. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
amdgpu_firmware_info debugfs will show rlcv/rlcp ucode version info Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jul 28, 2022
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idr_init_base(), implemented by commit 6ce711f2 ("idr: Make 1-based IDRs more efficient"), let us set an arbitrary base other than idr_init(), which uses base 0. Since, for this IDR, no ID < 1 is ever requested/allocated, using idr_init_base(&idr, 1) avoids unnecessary tree walks. Signed-off-by:
Danilo Krummrich <dakr@redhat.com> Signed-off-by:
Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220701185303.284082-3-dakr@redhat.com
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- Jul 25, 2022
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Alex Deucher authored
Use the former pad element to store the IP versions from the IP discovery table. This allows userspace to get the IP version from the kernel to better align with hardware IP versions. Proposed mesa patch: mesa/mesa!17411 (c8a63590) Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jul 18, 2022
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Guchun Chen authored
It's redundant, as now switching to rpm_mode to indicate runtime power management mode. Suggested-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Guchun Chen authored
This quirk is not needed any more as it's fixed by bypassing SMU FW reloading in runtime resume. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Guchun Chen authored
It can benefit code consistency in future. Suggested-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jun 15, 2022
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Michel Dänzer authored
The commit below changed the TTM manager size unit from pages to bytes, but failed to adjust the corresponding calculations in amdgpu_ioctl. Fixes: dfa714b8 ("drm/amdgpu: remove GTT accounting v2") Bug: drm/amd#1930 Bug: mesa/mesa#6642 Tested-by:
Martin Roukala <martin.roukala@mupuf.org> Tested-by:
Mike Lothian <mike@fireburn.co.uk> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Michel Dänzer <mdaenzer@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jun 14, 2022
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Michel Dänzer authored
The commit below changed the TTM manager size unit from pages to bytes, but failed to adjust the corresponding calculations in amdgpu_ioctl. Fixes: dfa714b8 ("drm/amdgpu: remove GTT accounting v2") Bug: drm/amd#1930 Bug: mesa/mesa#6642 Tested-by:
Martin Roukala <martin.roukala@mupuf.org> Tested-by:
Mike Lothian <mike@fireburn.co.uk> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Michel Dänzer <mdaenzer@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.18.x
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- May 26, 2022
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Christian König authored
Let each context have a pointer to the ctx manager and properly initialize the adev pointer inside the context manager. Reduce the BUG_ON() in amdgpu_ctx_add_fence() into a WARN_ON() and directly return the sequence number instead of writing into a parmeter. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Shashank Sharma <shashank.sharma@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- May 05, 2022
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Alex Deucher authored
This reverts commit b95dc06a. This workaround is no longer necessary. We have a better workaround in commit f95af4a9 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)"). Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Apr 28, 2022
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Guchun Chen authored
Disable runtime power management on several sienna cichlid cards, otherwise SMU will possibly fail to be resumed from runtime suspend. Will drop this after a clean solution between kernel driver and SMU FW is available. amdgpu 0000:63:00.0: amdgpu: GECC is enabled amdgpu 0000:63:00.0: amdgpu: SECUREDISPLAY: securedisplay ta ucode is not available amdgpu 0000:63:00.0: amdgpu: SMU is resuming... amdgpu 0000:63:00.0: amdgpu: SMU: I'm not done with your command: SMN_C2PMSG_66:0x0000000E SMN_C2PMSG_82:0x00000080 amdgpu 0000:63:00.0: amdgpu: Failed to SetDriverDramAddr! amdgpu 0000:63:00.0: amdgpu: Failed to setup smc hw! [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <smu> failed -62 amdgpu 0000:63:00.0: amdgpu: amdgpu_device_ip_resume failed (-62) v2: seperate to a function. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Feb 14, 2022
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Christian König authored
This is provided by TTM now. Also switch man->size to bytes instead of pages and fix the double printing of size and usage in debugfs. v2: fix size checking as well Signed-off-by:
Christian König <christian.koenig@amd.com> Tested-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220214093439.2989-8-christian.koenig@amd.com
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Christian König authored
This is provided by TTM now. Also switch man->size to bytes instead of pages and fix the double printing of size and usage in debugfs. v2: fix size checking as well Signed-off-by:
Christian König <christian.koenig@amd.com> Tested-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220214093439.2989-6-christian.koenig@amd.com
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- Feb 07, 2022
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Christian König authored
We want to have lockdep annotation here, so make sure that we reserve the PD while removing PRTs even if it isn't strictly necessary since the VM object is about to be destroyed anyway. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Some people complained about the name and this matches much more Linux naming conventions for object functions. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jan 25, 2022
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Alex Deucher authored
Seems more logical to enable runtime pm at the end of the init sequence so we don't end up entering runtime suspend before init is finished. Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We need to set the APU flag from IP discovery before we evaluate this code. Acked-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Mario Limonciello authored
Yellow carp has been outputting versions like `1093.24.0`, but this is supposed to be 69.24.0. That is the MSB is being interpreted incorrectly. The MSB is not part of the major version, but has generally been treated that way thus far. It's actually the program, and used to distinguish between two programs from a similar family but different codebase. Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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