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drm/amd/display: Add interface to track PHY state
[Why] Sometimes pixel clock needs to remain active after transmitter disable. [How] Use update_phy_state to track PHY state after stream enable/disable and program pixel clock as needed. Reviewed-by:Alvin Lee <alvin.lee2@amd.com> Acked-by:
Brian Chang <Brian.Chang@amd.com> Signed-off-by:
Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by:
Alvin Lee <alvin.lee2@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- drivers/gpu/drm/amd/display/dc/core/dc.c 15 additions, 3 deletionsdrivers/gpu/drm/amd/display/dc/core/dc.c
- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 10 additions, 2 deletionsdrivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
- drivers/gpu/drm/amd/display/dc/dc_link.h 1 addition, 0 deletionsdrivers/gpu/drm/amd/display/dc/dc_link.h
- drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 6 additions, 2 deletionsdrivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 6 additions, 3 deletionsdrivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c 6 additions, 3 deletionsdrivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c 32 additions, 0 deletionsdrivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h 3 additions, 0 deletionsdrivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h
- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c 1 addition, 0 deletionsdrivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
- drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h 6 additions, 0 deletionsdrivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
- drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 2 additions, 0 deletionsdrivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
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