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    6948f931
    drm/amdgpu: Implement a new userqueue fence driver · 6948f931
    arunpravin24 authored
    
    Developed a userqueue fence driver for the userqueue process shared
    BO synchronization.
    
    Create a dma fence having write pointer as the seqno and allocate a
    seq64 memory for each user queue process and feed this memory address
    into the firmware/hardware, thus the firmware writes the read pointer
    into the given address when the process completes it execution.
    Compare wptr and rptr, if rptr >= wptr, signal the fences for the waiting
    process to consume the buffers.
    
    v2: Worked on review comments from Christian for the following
        modifications
    
        - Add wptr as sequence number into the fence
        - Add a reference count for the fence driver
        - Add dma_fence_put below the list_del as it might
          frees the userq fence.
        - Trim unnecessary code in interrupt handler.
        - Check dma fence signaled state in dma fence creation
          function for a potential problem of hardware completing
          the job processing beforehand.
        - Add necessary locks.
        - Create a list and process all the unsignaled fences.
        - clean up fences in destroy function.
        - implement .signaled callback function
    
    v3: Worked on review comments from Christian
        - Modify naming convention for reference counted objects
        - Fix fence driver reference drop issue
        - Drop amdgpu_userq_fence_driver_process() function return value
    
    v4: Worked on review comments from Christian
        - Moved fence driver allocation into amdgpu_userq_fence_driver_alloc()
        - Added detail doc mentioning the differences b/w
          two spinlocks declared.
    
    v5: Worked on review comments from Christian
        - Check before upcast and remove local variable
        - Add error handling in fence_drv alloc function.
        - Move rptr read fn outside of the loop and remove WARN_ON in
          destroy function.
    
    v6:
      - clear the seq64 memory in user fence driver(Christian)
      - fix for the wptr va bo mapping(Christian)
      - move the fence_drv xa entry erase code from the interrupt handler
        into user fence destroy function
    
    Signed-off-by: default avatarArunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
    Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
    Suggested-by: default avatarChristian König <christian.koenig@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    6948f931
    History
    drm/amdgpu: Implement a new userqueue fence driver
    arunpravin24 authored
    
    Developed a userqueue fence driver for the userqueue process shared
    BO synchronization.
    
    Create a dma fence having write pointer as the seqno and allocate a
    seq64 memory for each user queue process and feed this memory address
    into the firmware/hardware, thus the firmware writes the read pointer
    into the given address when the process completes it execution.
    Compare wptr and rptr, if rptr >= wptr, signal the fences for the waiting
    process to consume the buffers.
    
    v2: Worked on review comments from Christian for the following
        modifications
    
        - Add wptr as sequence number into the fence
        - Add a reference count for the fence driver
        - Add dma_fence_put below the list_del as it might
          frees the userq fence.
        - Trim unnecessary code in interrupt handler.
        - Check dma fence signaled state in dma fence creation
          function for a potential problem of hardware completing
          the job processing beforehand.
        - Add necessary locks.
        - Create a list and process all the unsignaled fences.
        - clean up fences in destroy function.
        - implement .signaled callback function
    
    v3: Worked on review comments from Christian
        - Modify naming convention for reference counted objects
        - Fix fence driver reference drop issue
        - Drop amdgpu_userq_fence_driver_process() function return value
    
    v4: Worked on review comments from Christian
        - Moved fence driver allocation into amdgpu_userq_fence_driver_alloc()
        - Added detail doc mentioning the differences b/w
          two spinlocks declared.
    
    v5: Worked on review comments from Christian
        - Check before upcast and remove local variable
        - Add error handling in fence_drv alloc function.
        - Move rptr read fn outside of the loop and remove WARN_ON in
          destroy function.
    
    v6:
      - clear the seq64 memory in user fence driver(Christian)
      - fix for the wptr va bo mapping(Christian)
      - move the fence_drv xa entry erase code from the interrupt handler
        into user fence destroy function
    
    Signed-off-by: default avatarArunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
    Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
    Suggested-by: default avatarChristian König <christian.koenig@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>