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Commit 1d02d074 authored by Samuel Pitoiset's avatar Samuel Pitoiset Committed by Dylan Baker
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radv: fix missing cache flushes when clearing HTILE levels on GFX10+


The driver should accumulate the cache flush bits because if it uses
CP DMA for clearing the last level, it won't flush.

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <mesa/mesa!12170>
(cherry picked from commit ad83c06a)
parent 5b4b4b9e
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