- Nov 16, 2022
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Dylan Baker authored
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Dylan Baker authored
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- Nov 15, 2022
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Fixes: e737a99a ("Fix PPC detection on darwin") Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!19674> (cherry picked from commit 7710cc85)
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Closes: mesa/mesa#7675 Cc: mesa-stable Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Reviewed-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com> Part-of: <mesa/mesa!19653> (cherry picked from commit 14eef141)
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This reference was left over when the envvar was removed. Fixes: 231ccb61 ("docs: Remove no-longer-accurate text about the xlib driver") Reviewed-by: Yonggang Luo <luoyonggang@gmail.com> Part-of: <mesa/mesa!19593> (cherry picked from commit 9bfa939a)
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This extension was removed back in 2016, but it seems we left a mention of it in the docs. The entire section with this extension seems kinda pointless now, so let's drop it entirely. Fixes: f3e23ead ("egl: remove remnants of MESA_drm_display") Reviewed-by: David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!19719> (cherry picked from commit 9f2c9e4c)
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In linear PE mode the early and late depth stage do not only disagree about the cache layout, but they seem to fundamentally disagree about the buffer layout. When Z was written via the late stage, early tests always show spurious zfails, even if they are not in the same draw call. Cache flushing and pipe stalls don't help in that case. The only option to get reliable Z tests with linear render targets is to move all Z handling into the PE stage. Even when early Z writes are possible, we don't know if any other draw to the same surface needs late Z handling, so we must never use the early stage. Fixes: 53445284 ("etnaviv: add linear PE support") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Part-of: <mesa/mesa!19686> (cherry picked from commit 7fe91c9f)
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Otherwise we get empty output. Fixes: b07204d7 ("radeonsi/gfx11: interp changes for 16bit") Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!19637> (cherry picked from commit 88b1bb32)
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Add negative value is possible to wrap around. I haven't seen this "nuw" causes any problem yet, but let's remove it for safe. Fixes: 60ac5dda ("ac: Add NIR lowering for NGG GS.") Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!19718> (cherry picked from commit c21e184c)
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We should not use "nuw" here as negative add positive may wrap around (negative is 0xffffff??). This problem can be observed with LLVM15 (I can't see when LLVM14): %.neg = mul nsw i32 %31, -4 %163 = add nuw nsw i32 %.neg, 16 %164 = lshr i32 257, %.neg %165 = lshr i32 %164, %163 LLVM just assume %.neg is possitive, so pre-shift 0x01010101 by 16. This get wrong value because we can't get back the shifted bits with a negative shift right. Fixes: 75dbb404 ("ac/nir: Remove byte permute from prefix sum of the repack sequence.") Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!19718> (cherry picked from commit 982b5237)
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This fixes GALLIVM_DEBUG=asm for compute shaders, changing the hooks after dumping causes a segfault because the memory has already been finalised. Just add the hooks always, and before dumping anything. Fixes: f511d2a5 ("gallivm: rework coroutine malloc/free callouts.") Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!19714> (cherry picked from commit fb7de303)
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Per Ken suggestion, use ascending order for the start offset. Fixes: 6d28c6e5 ("i965: Select ranges of UBO data to be uploaded as push constants.") Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!19731> (cherry picked from commit 494e2edb)
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Dylan Baker authored
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- Nov 14, 2022
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The code builds up the dynamic array of objects (spirv_objs) and collect pointers to each of them into another dynamic array (spirv_ptr_objs). If the growth of the first array cause a reallocation, it is possible that the previous pointers end up invalid. Fixes: 77e929a5 ("intel/clc: allow multiple CL files to be compiled together") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <mesa/mesa!19730> (cherry picked from commit 9fd1d47a)
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This is a very scorched-earth approach which doesn't take into account whether or not there are any explicitly provided dependencies. We could take a finer-grained approach in theory but it's unlikely to matter in practice since you usually stall in Begin/EndRenderPass anyway. Fixes: 1d726940 ("vulkan: Add a common CmdBegin/EndRederPass implementation") Closes: mesa/mesa#6203 Closes: mesa/mesa#7650 Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19599> (cherry picked from commit 11b2a063)
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Fixes: 1d726940 ("vulkan: Add a common CmdBegin/EndRederPass implementation") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19599> (cherry picked from commit 4ff50519)
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Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above the limit we currently have. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <mesa/mesa!19669> (cherry picked from commit ae76bba3)
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Seems the intention was to check that both flags were not enabled instead we were checking that the floor flag was both set and not set so the result would always be false. Fixes: 3749a6ec ("nir: honor lower_double options for ffloor and ffract") Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!19642> (cherry picked from commit 34c52d8c)
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We were resetting the BO struct right before dumping its data. Fix this by moving the reset later. Fixes: 44fa8304 ('v3dv: add a refcount mechanism to BOs') Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <!19672> (cherry picked from commit 2c445971)
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Fixes: 40b66a44 ("anv, iris: Add Wa_22011440098 for DG2") Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19636> (cherry picked from commit ecd45175)
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Fixes: 40b66a44 ("anv, iris: Add Wa_22011440098 for DG2") Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19636> (cherry picked from commit 210d95bd)
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If we're in handle_collect()'s dst allocation and are part of a merge set near the end of the file, our check for reg_elem_size(reg) would let us use the preferred reg when that would immediately lead to allocate_dst_fixed() creating an interval extending thruogh reg_size(reg) that overflows the file. Avoids a regression on gfxbench5/gl_5_high_off/17.shader_test in the next commit. No change on shader-db. Cc: mesa-stable Part-of: <mesa/mesa!18946> (cherry picked from commit a39113b6)
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Dylan Baker authored
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If an application was transitioning out of fullscreen exclusive display mode, the wsi_display_connector->active state was not reset in vkReleaseDisplay() from fullscreen. When the app then later tried to go to fullscreen display mode again on the same display output with the same video mode, this caused _wsi_display_queue_next() to skip a required drmModeSetCrtc() during the first vkQueuePresent() after entering direct display mode. While this often worked by pure luck on a single-display setup, it goes sideways on a multi-display setup where the viewport of the associated crtc does not have a (x,y) offset of (0,0). E.g., XOrg/X11 RandR output leasing of an output whose viewport starts at x = 1920: 1. X-Server has RandR outputs viewport at x = 1920, in a shared framebuffer, shared across all crtc's on a X-Screen. 2. Application leases that output for direct display mode, 1st vkQueuePresent() triggers drmModeSetCrtc() of output to (x,y) = 0,0, as required for Vulkan/wsi/direct framebuffer setup. 3. Application does rendering and presenting. 4. Application vkReleaseDisplay() the output, terminates the RandR lease. X-Server takes over again. 5. X-Server modesets to reconfigure output back to viewport with (x,y) = 1920, 0. 6. Application leases same output again later on, and tries vkQueuePresent() again. Because of the bug fixed in this commit, the required drmModeSetCrtc() to (x,y) = 0,0 is erroneously skipped due to the stale cached connector state. 7. drmModePageflip() fails due to the wrong crtc viewport (x,y) = 1920, 0, mismatched for the need of the Vulkan framebuffer of (x,y) = 0,0. Kernel returns -ENOSPACE, Swapchain goes into permanent VK_ERROR_SURFACE_LOST state. Destroying and recreating the swapchain, as recommended by the Vulkan spec for error handling won't help. Game over! Resetting wsi_display_connector->active = false; fixes the problem of wrong / stale connector state and Vulkan/wsi/display clients are happy on multi-display setups again, as tested in various single- and multi-display configurations. This bug affects all Mesa releases with Vulkan/WSI/Display support and should therefore be backported. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Fixes: 352d320a ("vulkan: Add EXT_direct_mode_display [v2]") Cc: mesa-stable Part-of: <mesa/mesa!19484> (cherry picked from commit 24094ee0)
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Dylan Baker authored
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- Nov 11, 2022
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Lionel Landwerlin authored
Implement Wa_1508744258: Disable RHWO by setting 0x7010[14] by default except during resolve pass. Disable the RCC RHWO optimization at all times except when resolving single sampled color surfaces. v2: Move stalling to genX(cmd_buffer_apply_pipe_flushes) for clarity (Mark) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Mark Janes <markjanes@swizzler.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Cc: mesa-stable (cherry picked from commit ba0336ab) Part-of: <mesa/mesa!19671>
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Implement Wa_1508744258: Disable RHWO by setting 0x7010[14] by default except during resolve pass. Disable the RCC RHWO optimization at all times except when resolving single sampled color surfaces. MCS partial resolves are done via software (i.e., not via a HW bit) and so are not expected to need this workaround. Reviewed-by: Mark Janes <markjanes@swizzler.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 0fa540ef) Part-of: <mesa/mesa!19671>
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Some previous commits changed .gitlab-ci.yml, so the `test-docs-mr` was triggered. It failed due to the lack of toctree reference in documentation, even when the relnotes for 22.2.0 to 22.2.3 exist. This commit fixes that to make the CI pipeline green again. Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com> Part-of: <mesa/mesa!19604>
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We don't need to login anymore, but we can't use plain minio commands now. `ci-fairy` got a helper as `s3cp` to keep an almost identical API. Solved Conflicts: .gitlab-ci/common/init-stage2.sh .gitlab-ci/container/lava_build.sh .gitlab-ci/prepare-artifacts.sh src/amd/ci/traces-amd.yml src/freedreno/ci/traces-freedreno.yml src/gallium/frontends/lavapipe/ci/traces-lavapipe.yml Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com> (cherry picked from commit 67cee534) Part-of: <mesa/mesa!19604>
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ci-fairy is pulverized in possible different versions at Mesa CI. This commit updates all of them to the version that migrates minio to s3. Also, trigger the build of base and test containers, as both uses ci-fairy as well Solved Conflicts: .gitlab-ci/image-tags.yml Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com> (cherry picked from commit a04ed2f9) Part-of: <mesa/mesa!19604>
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Found some: - crashes in zink, softpipe - fails in a630-restricted - unexpectedpass in broadcom - fixed by mesa/piglit!730 More details in the test expectations files comments. Solved Conflicts: src/gallium/drivers/zink/ci/zink-lvp-skips.txt Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com> (cherry picked from commit a108e4f7) Part-of: <mesa/mesa!19604>
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With new S3 support, we can use JWT-only server interaction via the removal of `role-session` and `minio-host` arguments from PIGLIT_ARGS in YAML. This parameter change will come in a later commit. Solved Conflicts: .gitlab-ci/container/build-piglit.sh .gitlab-ci/image-tags.yml Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com> (cherry picked from commit 70ce1dca) Part-of: <mesa/mesa!19604>
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The rootfs generation is failing due to issues with the deqp and crosvm build stages. == crosvm == This week, crates.io released the bindgen cargo package at version 0.61.0, but this version could not be installed via `cargo install bindgen ...`, setting the version to the previous one to avoid breaking the Mesa rootfs builds. See also related failed job: https://gitlab.freedesktop.org/gallo/mesa/-/jobs/30046963 == deqp == The deqp build is failing due to the missing archive of an old zlib release version, which was deleted due to a CVE, see zlib 1.2.13 release notes. As the deqp uprev to 1.3.4.0, which contains the fix, was not straightforward, let's only apply the necessary patch to fix zlib source code download link and then remove this indirection in an eventual deqp uprev. Example of a failed kernel+rootfs build job: https://gitlab.freedesktop.org/gallo/mesa/-/jobs/30045324 Solved Conflicts: .gitlab-ci/image-tags.yml Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com> Reviewed-by: Yonggang Luo <luoyonggang@gmail.com> (cherry picked from commit db2c1488) Part-of: <mesa/mesa!19604>
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Stick to macos-11 to prevent accident broken always install meson with pip to prevent pull new version of python Cc: mesa-stable Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: Eric Engestrom <eric@igalia.com> Acked-by: Dylan Baker <dylan.c.baker@intel.com> Part-of: <mesa/mesa!19640>
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- Nov 10, 2022
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While Panfrost allocates linear images with strides that are a multiple of 64 bytes, other dma-buf producers on the system may not satisfy this requirement. However, at least on v7 and newer, any image with a regular format must have a stride that is a multiple of 64 bytes. This fixes a real bug in an application that created a linear R8_UNORM image with stride 480 bytes, imported it as an EGL_image, and then tried to texture from it with the GPU. Previously, the driver allowed this situation but it resulted in an imprecise fault from the GPU. This patch corrects the driver to reject the import as invalid due to the unaligned stride, ensuring we never attempt to texture from such a resource. To implement, we add some new layout queries to centralize knowledge about the stride alignment requirements, and we sprinkle in asserts to show how the invariant is upheld throughout the lifecycle of image creation to texturing. Cc: mesa-stable Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <mesa/mesa!19620> (cherry picked from commit 811f8a19)
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Fixes: 3ace6b96 ("compiler/types: Add a texture type") Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <mesa/mesa!19381> (cherry picked from commit 87526f79)
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This can cause us to stomp the contents of r5 before we have a chance to read it, like this: 0x3d103186bb800000 nop ; nop ; ldvary.r0 0x3d105686bbf40000 nop ; mov rf26, r5 ; ldvary.r1 0x020000ef0000d000 bu.allna 232, r:unif (0x0000001c / 0.000000) 0x3d1096c6bbf40000 nop ; mov rf27, r5 ; ldvary.r2 Here, the MOV in the last instruction is supposed to read r5 produced from ldvary.r0, but because we have inserted the bu instruction in between now that read happens at the same time that ldvary.r1 updates r5, stomping the value we were supposed to read. Fix this by disallowing injection of a branch instruction in between an ldvary instruction and its write to the r5 register 2 instructions later. Closes: #7062 Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> cc: mesa-stable Part-of: <!19616> (cherry picked from commit 1174f376)
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Dylan Baker authored
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- Nov 09, 2022
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If the map doesn't set MAP_DISCARD_RANGE, we do have to copy the existing contents over. MAP_WRITE on its only gives permission to replace the contents, unfortunately it does not require that the application actually do so. Closes: #7640 Fixes: 0b26a9f7 ("panfrost: Don't copy resources if replaced") Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reported-by: Roman Elshin Part-of: <mesa/mesa!19576> (cherry picked from commit cf7a3906)
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Fixes issue with "is helper invocation" that in recent SPIR-V is mapped to a volatile Load. The CSE was catching the loads before they were transformed in the new is_helper_invocation intrinsic (that is not reorderable). Fixes: 729df14e ("nir: Handle volatile semantics for loading HelperInvocation builtin") Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: M Henning <drawoc@darkrefraction.com> Part-of: <mesa/mesa!19432> (cherry picked from commit 8ab628ab)
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