- Aug 31, 2015
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 437cb1e3)
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The hardware is capable of dealing with GL1-style user clip planes. No clip vertex, no clip distances. Fixes a number of ucp tests, as well as neverball. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 58e24b47)
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This code was broken by the tess merge, and I totally missed it until now. I'm not sure this fixes anything but it stops the assert. Cc: "11.0" <mesa-stable@lists.freedesktop.org> Reviewed-by:
Glenn Kennard <glenn.kennard@gmail.com> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 69418831)
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On 32-bit we need to use PRIu64 flags for printfs, otherwise this segfaults in R600_DEBUG=help otherwise. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Cc: "11.0" <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 8d6d0cc1)
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This adds index queries (glGet*i_v) for GL_TEXTURE_BINDING_* and GL_SAMPLER_BINDING, as well as textue queries (glGetTex{,ture}Parameter*) for GL_TEXTURE_TARGET. CC: "10.6 11.0" <mesa-stable@lists.freedesktop.org> Reviewed-by:
Fredrik Höglund <fredrik@kde.org> Signed-off-by:
Fredrik Höglund <fredrik@kde.org> (cherry picked from commit 5aaaaebf)
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Signed-off-by:
Glenn Kennard <glenn.kennard@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 608c7b4a)
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Shaders that contain instruction data after an instruction with EOP could end up parsing that as an instruction, leading to various crashes and asserts in SB as it gets very confused if it sees for instance a loop start instruction jumping off to some random point. Add a couple of asserts, and print EOP bit if set in old asm printer. Signed-off-by:
Glenn Kennard <glenn.kennard@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit a830225a)
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e8e443 missed adding check for undef values also in unreserve function, leading to an assert triggering. Signed-off-by:
Glenn Kennard <glenn.kennard@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 36f1999a)
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Cube maps are special in that they have separate teximages for each face. We handled that by copying the data to them separately, but in case zoffset != 0 or depth != 6 we would read off the end of the client array or modify the wrong images. zoffset/depth have already been verified by the time the code gets to this stage, so no need to double-check. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Brian Paul <brianp@vmware.com> Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 2259b111)
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The split_virtual_grfs code doesn't properly rewrite reladdr so we need to make sure that any uniform indirects are lowered away first. This fixes the glsl-fs-uniform-indexed-by-swizzled-vec4.shader_test in piglit Cc: "10.6" <mesa-stable@lists.freedesktop.org> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit fee0c5af) Conflicts: src/mesa/drivers/dri/i965/brw_fs.cpp
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This works if drivers upsample on upload (like all radeon ones do). The alternative is an unexpected GL error from anything calling _mesa_update_state and possibly other issues. Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit f432ae89)
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GetTexImage can read to stencil8 but only from a stencil or depthstencil textures. This fixes a bunch of failures in CTS GL33-CTS.gtf32.GL3Tests.packed_pixels Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Cc: "11.0" <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit c1452983)
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This fixes GL45-CTS.gtf44.GL31Tests.texture_stencil8.texture_stencil8_gl44 from the ogl conform suite. Reviewed-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 529acab2)
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On the older platforms where we don't have logical contexts preserving state across batches, we emit the invariant state setup on every batch using the brw_invariant_state atom. This includes the pipeline selection which is cached with the introduction of commit 0e0e23ef Author: Jordan Justen <jordan.l.justen@intel.com> Date: Wed Apr 22 11:43:50 2015 -0700 i965/state: Emit pipeline select when changing pipelines However, we do not reset the cache between batches on context-less platforms resulting in us not setting the pipeline selection and can cause GPU hangs if a media pipelined was loaded in the meantime (e.g. mixing mplayer/gstreamer using libva and gnome-shell). A simple solution is to just forcibly re-emit the pipeline select along with the invariant state and reset the cache at that point. Reported-and-tested-by:
Tomasz C. <tomaszc@o2.pl> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91254 Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4e5752e2)
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This fixes bin/ext_framebuffer_multisample-formats all_samples Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit e18c29b0)
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Same as commit 1af0641d but for nvc0. If an integer texture is bound to RT0, don't do alpha-to-one or alpha-to-coverage. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit a6ad49cb)
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This was missed when I did fp64, I've sent a piglit test to cover the case as well. Reviewed-by:
Timothy Arceri <t_arceri@yahoo.com.au> Cc: "11.0" <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit 45971fd0)
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Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit abbf05cf)
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When the edge flag element is enabled then the elements are slightly reordered so that the edge flag is always the last one. This was confusing the code to upload the 3DSTATE_VF_INSTANCING state because that is uploaded with a separate loop which has an instruction for each element. The indices used in these instructions weren't taking into account the reordering so the state would be incorrect. v2: Use nr_elements instead of brw->vb.nr_enabled so that it will cope when gl_VertexID is used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91292 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
Ben Widawsky <ben@bwidawsk.net> Tested-by:
Mark Janes <mark.a.janes@intel.com> (cherry picked from commit 3a1ab234)
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The edge flag data on Gen6+ is passed through the fixed function hardware as an extra attribute. According to the PRM it must be the last valid VERTEX_ELEMENT structure. However if the vertex ID is also used then another extra element is added to source the VID. This made it so the vertex ID is in the wrong register in the vertex shader and the edge attribute is no longer in the last element. v2: Also implement for BDW+ v3 [by Ben]: Remove 10.5 tag. Too late. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84677 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Kristian Høgsberg <krh@bitplanet.net> Signed-off-by:
Ben Widawsky <ben@bwidawsk.net> Tested-by:
Ben Widawsky <ben@bwidawsk.net> Tested-by:
Mark Janes <mark.a.janes@intel.com> (cherry picked from commit fb02b4ec)
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Fixes https://bugs.freedesktop.org/show_bug.cgi?id=91726 Signed-off-by:
Glenn Kennard <glenn.kennard@gmail.com> Cc: "11.0" <mesa-stable@lists.freedesktop.org> Signed-off-by:
Dave Airlie <airlied@gmail.com> (cherry picked from commit 50932268)
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- Aug 22, 2015
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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The shader-cache isn't finished, so the configure checks are a bit premature and will only stand to confuse users of Mesa 11.0. This is a squash of the follow four reverts: Revert "Rename sha1.c and sha1.h to mesa-sha1.c and mesa-sha1.h" Revert "configure: Add machinery for --enable-shader-cache (and --disable-shader-cache)" Revert "sha1: Fix gcry_md_hd_t typo." Revert "mesa: Add mesa SHA-1 functions" Reviewed-by:
Carl Worth <cworth@cworth.org>
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Fixes a compiler warning of defined but not used function when HAVE_MKOSTEMP is defined. Fixes: eb3e2562(configure.ac: check for mkostemp()) Signed-off-by:
Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by:
Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by:
Matt Turner <mattst88@gmail.com> Reviewed-by:
Thomas Helland <thomashelland90@gmail.com>
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Emil Velikov authored
Fixes: e2b59a39(mapi: add ARB_tessellation_shader) Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
The build/file was removed with an earlier commit while the EXTRA_DIST was forgotten. Fixes: 66d77cd7 (scons: don't build the kms-dri winsys) Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
The files are not referenced in any other place in whole of mesa. They are likely remnants of the early development stage. Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
vc4 conflicts with ilo, when build on x86 as it's build for emulation purposes. In that mode a i965-like symbol is exported by vc4, which conflicts with the ilo one in the gallium-dri megadriver. Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Reviewed-by:
Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Reviewed-by:
Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit fa342251)
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit a43b3dd9)
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Chris Wilson authored
The nv_conditional_render piglits were sporadically failing. Moving the control flush from the write and placing it just before the read was sufficient to make the piglits pass a 1000/1000 times. The bspec says that the flush enable bit "waits until all previous writes of immediate data from post sync circles are complete before executing the next command" - the operative word being previous! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90691 Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Neil Roberts <neil@linux.intel.com> Cc: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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- Aug 21, 2015
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Emma Anholt authored
I switched us to tracking whether the results *could* go to r4, but then didn't make a separate register class for the class bits that included r4. Switch the "any" class to actually be "any", and name the "any but r4" class more appropriately. total instructions in shared programs: 96798 -> 94680 (-2.19%) instructions in affected programs: 62736 -> 60618 (-3.38%)
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Emma Anholt authored
total instructions in shared programs: 97580 -> 96798 (-0.80%) instructions in affected programs: 52826 -> 52044 (-1.48%)
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Emma Anholt authored
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