- Oct 30, 2019
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Dylan Baker authored
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Jordan Justen authored
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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Jordan Justen authored
These reworks were combined into this patch: * Matt Turner: i965: Disable NoDDChk/NoDDClr test on Gen12+ * Francisco Jerez: intel/eu/validate/gen12: Disable qword_low_power_no_depctrl eu_validate test. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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Jordan Justen authored
Reworks: * adjust 64-bit support, hiz (Jason Ekstrand) * sim-id (Lionel Landwerlin) * adjust threads, urb size (Rafael Antognolli) * adjust urb size (Kenneth Graunke) Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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Lionel Landwerlin authored
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
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Bas Nieuwenhuizen authored
Calculated the number for allocation and did not reserve space .... Fixes: 2117c53b "radv: Add temporary datastructure for submissions." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Rafael Antognolli authored
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Rafael Antognolli authored
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Rafael Antognolli authored
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Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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Daniel Schürmann authored
VGPR spilling is implemented via MUBUF instructions and scratch memory. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
This patch also moves private_segment_buffer and scratch_offset to Program to easily access it. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Variables spilled on both branch legs need to be assigned to the same spilling slot. These affinities can be transitive through multiple merge blocks. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
This patch makes the live variable analysis more precise w.r.t. killed phi operands and the block's register pressure. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Daniel Schürmann authored
Converting to 'Conventional SSA Form' ensures correctness w.r.t. spilling of phi nodes. Previously, it was possible that phi operands have intersecting live-ranges, and thus, couldn't get spilled to the same spilling slot. For this reason, ACO tried to avoid to spill phis, even if it was beneficial. This patch implements a conversion pass which is currently only called if spilling is necessary. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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Jonathan Marek authored
Fixes these deqp tests (and more): dEQP-GLES2.functional.draw.draw_arrays.points.single_attribute dEQP-GLES2.functional.draw.draw_arrays.points.multiple_attributes dEQP-GLES2.functional.draw.draw_arrays.points.default_attribute dEQP-GLES2.functional.draw.draw_elements.points.single_attribute dEQP-GLES2.functional.draw.draw_elements.points.multiple_attributes dEQP-GLES2.functional.draw.draw_elements.points.default_attribute Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Jonathan Marek authored
The final version of previous stencil fix patch ended up breaking one-sided stencil. Fixes remaining failures in these deqp tests (tested on GC3000/GC7000L): dEQP-GLES2.functional.fragment_ops.depth_stencil.* Note: deqp tests require --deqp-gl-config-name=rgba8888d24s8ms0 Fixes: 05da025f ("etnaviv: fix two-sided stencil") Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Jonathan Marek authored
Fixes remaining failures in these deqp tests (tested on GC3000/GC7000L): dEQP-GLES2.functional.polygon_offset.* Fixes: 6c3c05dc ("etnaviv: fix polygon offset") Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Jordan Justen authored
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
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Rafael Antognolli authored
On gen11 and older, compressed images are tiled and aligned to 4K. On gen12 this 4K alignment restriction was removed. However, only aligning the fast clear color buffer to 64B (a cacheline, as it's on the documentation) is causing some bugs where the fast clear color is not converted during the fast clear operation. Aligning things to 4K seems to fix it. v2: Fix typo case in the comment (Nanley) v3: Rebase and fix conflicts. v4: Fix rebase mistake (Nanley). Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
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Rafael Antognolli authored
On gen11 and older, compressed images are tiled and aligned to 4K. On gen12 this 4K alignment restriction was removed. However, only aligning the fast clear color buffer to 64B (a cacheline, as it's on the documentation) is causing some bugs where the fast clear color is not converted during the fast clear operation. Aligning things to 4K seems to fix it. v2: Assert that image->planes[plane].offset is 4K aligned (Nanley) Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
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Erik Faye-Lund authored
While we're at it, make sure we error out if it's not supported when required. This brings us a bit closer to being able to test on SwiftShader, which doesn't currently support KHR_external_memory_fd.
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Bas Nieuwenhuizen authored
Winsys semaphores without signal operation get silently ignored. Not so for syncobjs, so actually signal them. Fixes: 84d9551b "radv: Always enable syncobj when supported for all fences/semaphores." Closes: mesa/mesa#2030 Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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Closes: #1974 Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
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It was joining from the wrong blocks and block.kind is a bitmask instead of an enum. Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
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Matt Turner authored
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
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Matt Turner authored
TGL uses different data (and even a different format!) for each source. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
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Matt Turner authored
TGL will have separate tables for src0 and src1, so the shared function will no longer make sense. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
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Matt Turner authored
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
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Matt Turner authored
The EU compaction unit test fuzzes the compaction code by flipping bits. We use a simple skip_bits() function with a list of reserved bits to ignore, but for more complex cases like invalid combinations of register file:type, we need either machinery to check validity or for these functions to simply inform us whether a combination was valid. enum brw_reg_type a 4-bit field in brw_reg, so rather than expanding it with an "INVALID" value, just return -1 and let the caller check for that. Scott suggested redefining unreachable() within the unit test to longjmp() which would allow driver code like this to still use it and allow the test to handle expected failures like this. If that plan works out, I plan to revert this.
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Jonathan Marek authored
Mostly for vertex formats, but they are supported as texture formats too (untested however). Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Clark <robdclark@gmail.com>
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