intel/fs: Handle payload node interference in destinations
Starting with d0d039a4, we emit writes to the push constant chunk of the payload to stomp out-of-bounds data to zero for Vulkan. Then, in 369eab94, we started emitting shader preamble code for emulated push constants on Gen12.5 parts. In either of these cases, we can run into issues if we don't have a proper live range for some of the payload registers where they get used for something and then smashed by our push handling code. We've not seen many issues with this yet because it only happens when you have dead push constants. Fixes: d0d039a4 "anv: Emit pushed UBO bounds checking code..." Fixes: 369eab94 "intel/fs: Emit code for Gen12-HP indirect..." Reviewed-by:Jordan Justen <jordan.l.justen@intel.com> Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <mesa/mesa!9501> (cherry picked from commit b9e9f92f)
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