- Nov 15, 2007
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Jesse Barnes authored
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Jesse Barnes authored
According to several users, a default brightness of 0 results in much better TV output. Improved control of these parameters will be provided by Randr1.3, which will standardize several output properties across various chips.
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Jesse Barnes authored
Allows users to use 1080p modes on TV out, see bug #13034.
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Zhenyu Wang authored
i830_reg.h only contains 3d engine cmds for 8XX chips.
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Zhenyu Wang authored
where we put MMIO control reg in, and shared with intel_reg_dump program.
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Jesse Barnes authored
Open the "actual_brightness" file as read only, since we only read from it. Also set an initial backlight_duty_cycle at init time so we don't set the brightness to 0 at startup.
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Jesse Barnes authored
Several people have reported that they see frequent FBC related display corruption on 965GM, so disable it for now. Users wanting to enable it can use the driver option "Framebuffercompression" to override the default.
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- Nov 14, 2007
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Jesse Barnes authored
Needed for the new debug code
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Jesse Barnes authored
We need to look at "actual_brightness" rather than "brightness". The former contains the brightness value the kernel driver has actually set, while the latter is merely what the user requested.
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Jesse Barnes authored
To be consistent, it should say 'plane' rather than 'pipe'.
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Jesse Barnes authored
Just for completeness.
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Jesse Barnes authored
Some of the hw state restoration callbacks may want to use the ring for various things like stopping video playback, so leave the ring enabled until we get back from RestoreHWState. Also rename the functions so that their purpose is clearer and remove a couple of redundant lines.
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Zhenyu Wang authored
This slightly reworks my last fbc patch. We don't support tiled front buffer with XAA now, so also disable fbc on it. If tiled alloc failed, disable fbc too.
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Keith Packard authored
The PLL spreadsheet makes the precise register ranges allowed for each mode quite clear, and shows a few inaccuracies in the b-spec. In particular, the N register value may range from 1 to 6 instead of 3 to 8. This should close the gap we've seen in the reachable frequencies.
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Zhenyu Wang authored
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Zhenyu Wang authored
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Jesse Barnes authored
This really isn't an error in general. If vblank pipe setup really fails for some reason, it'll be obvious enough when the user tries to use vblank events for something. Patch from Hong Liu.
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- Nov 12, 2007
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Jesse Barnes authored
This commit fixes backlight support for several platforms. Except on recent machines supporting the IGD OpRegion specification, backlight control is rather platform specific. In some cases, we can program the native backlight control regsiters directly without any trouble. On others, we need to use the legacy backlight control register. On still others, we need a combination of the two. And on some platforms, none of the above will work, so we go through the kernel backlight interface, which provides a platform specific driver for backlight control.
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Jesse Barnes authored
Check against DPLL_A instead of DPLL_B before writing PIPEACONF. Thanks to Colin Guthrie for his sharp eyes.
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- Nov 09, 2007
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Jesse Barnes authored
Needed in the XF86DRI_MM case.
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Jesse Barnes authored
Remove unused 'ret' variable, move pI830 under #ifdef XF86DRI_MM in i830_allocate_memory.
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Jesse Barnes authored
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Jesse Barnes authored
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Jesse Barnes authored
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Jesse Barnes authored
If EXA is compiled into the driver, default to using it for acceleration. Hopefully we can remove XAA entirely one day.
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Jesse Barnes authored
When calling the video DPMS off function, make sure we zero out the current crtc so that it will be properly re-set up next time video is turned on. Fix from Peter Clifton with changes by Keith Packard.
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Jesse Barnes authored
The overlay width & height scaling clamp check was reversed. Fix that and update the comment.
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Jesse Barnes authored
In the absence of full suspend/resume support in the kernel, we have to save/restore state in Enter/LeaveVT. For 8xx chips, 3D state may be lost during suspend/resume, so re-emit the basic setup at EnterVT time. Patch from Peter Clifton.
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- Nov 08, 2007
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Emma Anholt authored
While I'm here, fix the chip description to be LVDS instead of TMDS in i2c device.
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Jesse Barnes authored
If the DPLL isn't enabled or is in VGA mode, writing the PIPEnCONF registers may cause a hang or crash. So ensure the DPLL is in the proper state before writing them. Another excellent fix from Peter Clifton.
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- Nov 01, 2007
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Jesse Barnes authored
Fix a long standing bug in the framebuffer compression code (thanks to Pierre Willenbrock!) that prevented FBC from working correctly if the front buffer was anywhere but fence register 0.
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Zhenyu Wang authored
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- Oct 31, 2007
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Alan Coopersmith authored
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Alan Coopersmith authored
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- Oct 24, 2007
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Thomas Hellstrom authored
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Emma Anholt authored
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- Oct 22, 2007
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Jesse Barnes authored
Add a VGA AR dumping function so we can debug text mode problems too.
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- Oct 19, 2007
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Emma Anholt authored
This shows one of the reasons for the gaps: with the other settings, the VCO is too low inside the gap. However, it also points out another issue: we aren't using the high end of the VCO range due to some other limits being hit.
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- Oct 18, 2007
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Emma Anholt authored
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