zink_screen.c 60.2 KB
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/*
 * Copyright 2018 Collabora Ltd.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * on the rights to use, copy, modify, merge, publish, distribute, sub
 * license, and/or sell copies of the Software, and to permit persons to whom
 * the Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#include "zink_screen.h"

#include "zink_compiler.h"
#include "zink_context.h"
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#include "zink_device_info.h"
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#include "zink_descriptors.h"
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#include "zink_fence.h"
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#include "zink_format.h"
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#include "zink_framebuffer.h"
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#include "zink_instance.h"
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#include "zink_public.h"
#include "zink_resource.h"

#include "os/os_process.h"
#include "util/u_debug.h"
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#include "util/format/u_format.h"
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#include "util/hash_table.h"
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#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_screen.h"
#include "util/u_string.h"
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#include "util/u_transfer_helper.h"
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#include "util/xmlconfig.h"
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#include "util/u_cpu_detect.h"

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#include "frontend/sw_winsys.h"
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static const struct debug_named_value
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zink_debug_options[] = {
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   { "nir", ZINK_DEBUG_NIR, "Dump NIR during program compile" },
   { "spirv", ZINK_DEBUG_SPIRV, "Dump SPIR-V during program compile" },
   { "tgsi", ZINK_DEBUG_TGSI, "Dump TGSI during program compile" },
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   { "validation", ZINK_DEBUG_VALIDATION, "Dump Validation layer output" },
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   DEBUG_NAMED_VALUE_END
};

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DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug, "ZINK_DEBUG", zink_debug_options, 0)
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uint32_t
zink_debug;

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static const struct debug_named_value
zink_descriptor_options[] = {
   { "auto", ZINK_DESCRIPTOR_MODE_AUTO, "Automatically detect best mode" },
   { "lazy", ZINK_DESCRIPTOR_MODE_LAZY, "Don't cache, do least amount of updates" },
   { "notemplates", ZINK_DESCRIPTOR_MODE_NOTEMPLATES, "Cache, but disable templated updates" },
   DEBUG_NAMED_VALUE_END
};

DEBUG_GET_ONCE_FLAGS_OPTION(zink_descriptor_mode, "ZINK_DESCRIPTORS", zink_descriptor_options, ZINK_DESCRIPTOR_MODE_AUTO)

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static const char *
zink_get_vendor(struct pipe_screen *pscreen)
{
   return "Collabora Ltd";
}

static const char *
zink_get_device_vendor(struct pipe_screen *pscreen)
{
   struct zink_screen *screen = zink_screen(pscreen);
   static char buf[1000];
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   snprintf(buf, sizeof(buf), "Unknown (vendor-id: 0x%04x)", screen->info.props.vendorID);
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   return buf;
}

static const char *
zink_get_name(struct pipe_screen *pscreen)
{
   struct zink_screen *screen = zink_screen(pscreen);
   static char buf[1000];
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   snprintf(buf, sizeof(buf), "zink (%s)", screen->info.props.deviceName);
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   return buf;
}

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static bool
equals_ivci(const void *a, const void *b)
{
   return memcmp(a, b, sizeof(VkImageViewCreateInfo)) == 0;
}

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static bool
equals_bvci(const void *a, const void *b)
{
   return memcmp(a, b, sizeof(VkBufferViewCreateInfo)) == 0;
}

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static uint32_t
hash_framebuffer_state(const void *key)
{
   struct zink_framebuffer_state* s = (struct zink_framebuffer_state*)key;
   return _mesa_hash_data(key, offsetof(struct zink_framebuffer_state, attachments) + sizeof(s->attachments[0]) * s->num_attachments);
}

static bool
equals_framebuffer_state(const void *a, const void *b)
{
   struct zink_framebuffer_state *s = (struct zink_framebuffer_state*)a;
   return memcmp(a, b, offsetof(struct zink_framebuffer_state, attachments) + sizeof(s->attachments[0]) * s->num_attachments) == 0;
}

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static VkDeviceSize
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get_video_mem(struct zink_screen *screen)
{
   VkDeviceSize size = 0;
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   for (uint32_t i = 0; i < screen->info.mem_props.memoryHeapCount; ++i) {
      if (screen->info.mem_props.memoryHeaps[i].flags &
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          VK_MEMORY_HEAP_DEVICE_LOCAL_BIT)
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         size += screen->info.mem_props.memoryHeaps[i].size;
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   }
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   return size;
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}

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static void
disk_cache_init(struct zink_screen *screen)
{
#ifdef ENABLE_SHADER_CACHE
   static char buf[1000];
   snprintf(buf, sizeof(buf), "zink_%x04x", screen->info.props.vendorID);

   screen->disk_cache = disk_cache_create(buf, screen->info.props.deviceName, 0);
   if (screen->disk_cache)
      disk_cache_compute_key(screen->disk_cache, buf, strlen(buf), screen->disk_cache_key);
#endif
}

void
zink_screen_update_pipeline_cache(struct zink_screen *screen)
{
   size_t size = 0;

   if (!screen->disk_cache)
      return;
   if (vkGetPipelineCacheData(screen->dev, screen->pipeline_cache, &size, NULL) != VK_SUCCESS)
      return;
   if (screen->pipeline_cache_size == size)
      return;
   void *data = malloc(size);
   if (!data)
      return;
   if (vkGetPipelineCacheData(screen->dev, screen->pipeline_cache, &size, data) == VK_SUCCESS) {
      screen->pipeline_cache_size = size;
      disk_cache_put(screen->disk_cache, screen->disk_cache_key, data, size, NULL);
   }
   free(data);
}

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static int
zink_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
                       enum pipe_compute_cap param, void *ret)
{
   struct zink_screen *screen = zink_screen(pscreen);
#define RET(x) do {                  \
   if (ret)                          \
      memcpy(ret, x, sizeof(x));     \
   return sizeof(x);                 \
} while (0)

   switch (param) {
   case PIPE_COMPUTE_CAP_ADDRESS_BITS:
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      RET((uint32_t []){ 64 });
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   case PIPE_COMPUTE_CAP_IR_TARGET:
      if (ret)
         strcpy(ret, "nir");
      return 4;

   case PIPE_COMPUTE_CAP_GRID_DIMENSION:
      RET((uint64_t []) { 3 });

   case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
      RET(((uint64_t []) { screen->info.props.limits.maxComputeWorkGroupCount[0],
                           screen->info.props.limits.maxComputeWorkGroupCount[1],
                           screen->info.props.limits.maxComputeWorkGroupCount[2] }));

   case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
      /* MaxComputeWorkGroupSize[0..2] */
      RET(((uint64_t []) {screen->info.props.limits.maxComputeWorkGroupSize[0],
                          screen->info.props.limits.maxComputeWorkGroupSize[1],
                          screen->info.props.limits.maxComputeWorkGroupSize[2]}));

   case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
   case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
      RET((uint64_t []) { screen->info.props.limits.maxComputeWorkGroupInvocations });

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   case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
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   case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
      RET((uint64_t []) { screen->info.props.limits.maxComputeSharedMemorySize });

   case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
      RET((uint32_t []) { 1 });

   case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
      RET((uint32_t []) { screen->info.props11.subgroupSize });

   case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
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   case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
      RET((uint64_t []) { 1 << 30 }); /* does vulkan even expose this? */

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   case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
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      RET((uint32_t []) { 400 }); /* does vulkan even expose this? */

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   case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
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      RET((uint32_t []) { 8 }); /* does vulkan even expose this? */
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   case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
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      RET((uint64_t []) { 1024 }); /* does vulkan even expose this? */
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   default:
      unreachable("unknown compute param");
   }
}

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static int
zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
   struct zink_screen *screen = zink_screen(pscreen);

   switch (param) {
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   case PIPE_CAP_ANISOTROPIC_FILTER:
      return screen->info.feats.features.samplerAnisotropy;

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   case PIPE_CAP_NPOT_TEXTURES:
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   case PIPE_CAP_TGSI_TEXCOORD:
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   case PIPE_CAP_DRAW_INDIRECT:
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   case PIPE_CAP_TEXTURE_QUERY_LOD:
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   case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
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   case PIPE_CAP_CLEAR_TEXTURE:
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   case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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   case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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   case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
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   case PIPE_CAP_QUERY_BUFFER_OBJECT:
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   case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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   case PIPE_CAP_CLIP_HALFZ:
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   case PIPE_CAP_TGSI_TXQS:
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   case PIPE_CAP_TEXTURE_BARRIER:
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   case PIPE_CAP_TGSI_VOTE:
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   case PIPE_CAP_DRAW_PARAMETERS:
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   case PIPE_CAP_QUERY_SO_OVERFLOW:
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   case PIPE_CAP_GL_SPIRV:
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   case PIPE_CAP_CLEAR_SCISSORED:
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   case PIPE_CAP_INVALIDATE_BUFFER:
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   case PIPE_CAP_PREFER_REAL_BUFFER_IN_CONSTBUF0:
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      return 1;

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   case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
      return screen->info.have_KHR_sampler_mirror_clamp_to_edge;

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   case PIPE_CAP_POLYGON_OFFSET_CLAMP:
      return screen->info.feats.features.depthBiasClamp;

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   case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE:
      return screen->info.feats.features.pipelineStatisticsQuery;

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   case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
      return screen->info.feats.features.robustBufferAccess;

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   case PIPE_CAP_MULTI_DRAW_INDIRECT:
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      return screen->info.feats.features.multiDrawIndirect;

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   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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      return screen->info.have_KHR_draw_indirect_count;
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   case PIPE_CAP_START_INSTANCE:
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      return (screen->info.have_vulkan12 && screen->info.feats11.shaderDrawParameters) ||
              screen->info.have_KHR_shader_draw_parameters;
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   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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      return screen->info.have_EXT_vertex_attribute_divisor;
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   case PIPE_CAP_BLEND_EQUATION_ADVANCED:
      return screen->info.have_EXT_blend_operation_advanced;

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   case PIPE_CAP_MAX_VERTEX_STREAMS:
      return screen->info.tf_props.maxTransformFeedbackStreams;

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   case PIPE_CAP_INT64:
   case PIPE_CAP_INT64_DIVMOD:
   case PIPE_CAP_DOUBLES:
      return 1;

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   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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      if (!screen->info.feats.features.dualSrcBlend)
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         return 0;
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      return screen->info.props.limits.maxFragmentDualSrcAttachments;
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   case PIPE_CAP_MAX_RENDER_TARGETS:
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      return screen->info.props.limits.maxColorAttachments;
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   case PIPE_CAP_OCCLUSION_QUERY:
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      return 1;

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   case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
      return screen->info.have_EXT_sample_locations && screen->info.have_EXT_extended_dynamic_state;

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   case PIPE_CAP_QUERY_TIME_ELAPSED:
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      return screen->timestamp_valid_bits > 0;
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   case PIPE_CAP_TEXTURE_MULTISAMPLE:
      return 1;

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   case PIPE_CAP_FRAGMENT_SHADER_INTERLOCK:
      return screen->info.have_EXT_fragment_shader_interlock;

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   case PIPE_CAP_POINT_SPRITE:
      return 1;

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   case PIPE_CAP_SAMPLE_SHADING:
      return screen->info.feats.features.sampleRateShading;

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   case PIPE_CAP_TEXTURE_SWIZZLE:
      return 1;

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   case PIPE_CAP_GL_CLAMP:
      return 0;

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   case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
      return screen->info.driver_props.driverID == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA_KHR ||
             screen->info.driver_props.driverID == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS_KHR ?
             0 : PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50;

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   case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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      return screen->info.props.limits.maxImageDimension2D;
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   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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      return 1 + util_logbase2(screen->info.props.limits.maxImageDimension3D);
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   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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      return 1 + util_logbase2(screen->info.props.limits.maxImageDimensionCube);
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   case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
   case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
   case PIPE_CAP_VERTEX_SHADER_SATURATE:
      return 1;

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   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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   case PIPE_CAP_INDEP_BLEND_ENABLE:
   case PIPE_CAP_INDEP_BLEND_FUNC:
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      return screen->info.feats.features.independentBlend;
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   case PIPE_CAP_NO_DITHERING:
      return 1;

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   case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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      return screen->info.have_EXT_transform_feedback ? screen->info.tf_props.maxTransformFeedbackBuffers : 0;
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   case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
   case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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      return screen->info.have_EXT_transform_feedback;
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   case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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      return screen->info.props.limits.maxImageArrayLayers;
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   case PIPE_CAP_DEPTH_CLIP_DISABLE:
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      return screen->info.feats.features.depthClamp;
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   case PIPE_CAP_SHADER_STENCIL_EXPORT:
      return screen->info.have_EXT_shader_stencil_export;

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   case PIPE_CAP_TGSI_INSTANCEID:
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   case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
   case PIPE_CAP_SEAMLESS_CUBE_MAP:
      return 1;

   case PIPE_CAP_MIN_TEXEL_OFFSET:
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      return screen->info.props.limits.minTexelOffset;
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   case PIPE_CAP_MAX_TEXEL_OFFSET:
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      return screen->info.props.limits.maxTexelOffset;
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   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
      return 1;

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   case PIPE_CAP_CONDITIONAL_RENDER:
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     return screen->info.have_EXT_conditional_rendering;
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   case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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   case PIPE_CAP_GLSL_FEATURE_LEVEL:
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      return 460;
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   case PIPE_CAP_COMPUTE:
      return 1;

   case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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      return screen->info.props.limits.minUniformBufferOffsetAlignment;
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   case PIPE_CAP_QUERY_TIMESTAMP:
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      return screen->info.have_EXT_calibrated_timestamps &&
             screen->timestamp_valid_bits > 0;
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   case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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      return screen->info.props.limits.minMemoryMapAlignment;
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   case PIPE_CAP_CUBE_MAP_ARRAY:
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      return screen->info.feats.features.imageCubeArray;
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   case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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   case PIPE_CAP_PRIMITIVE_RESTART:
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      return 1;

   case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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      return screen->info.props.limits.minTexelBufferOffsetAlignment;
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   case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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      return 1;
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   case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
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      return screen->info.props.limits.maxTexelBufferElements;
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   case PIPE_CAP_ENDIANNESS:
      return PIPE_ENDIAN_NATIVE; /* unsure */

   case PIPE_CAP_MAX_VIEWPORTS:
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      return screen->info.props.limits.maxViewports;
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   case PIPE_CAP_IMAGE_LOAD_FORMATTED:
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      return screen->info.feats.features.shaderStorageImageExtendedFormats &&
             screen->info.feats.features.shaderStorageImageReadWithoutFormat &&
             screen->info.feats.features.shaderStorageImageWriteWithoutFormat;
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   case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
      return 1;

   case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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      return screen->info.props.limits.maxGeometryOutputVertices;
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   case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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      return screen->info.props.limits.maxGeometryTotalOutputComponents;
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   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
      return 4;

   case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
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      return screen->info.props.limits.minTexelGatherOffset;
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   case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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      return screen->info.props.limits.maxTexelGatherOffset;
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   case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
      return 1;

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   case PIPE_CAP_VENDOR_ID:
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      return screen->info.props.vendorID;
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   case PIPE_CAP_DEVICE_ID:
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      return screen->info.props.deviceID;
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   case PIPE_CAP_ACCELERATED:
      return 1;
   case PIPE_CAP_VIDEO_MEMORY:
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      return get_video_mem(screen) >> 20;
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   case PIPE_CAP_UMA:
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      return screen->info.props.deviceType == VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
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   case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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      return screen->info.props.limits.maxVertexInputBindingStride;
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   case PIPE_CAP_SAMPLER_VIEW_TARGET:
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   case PIPE_CAP_EMULATE_ARGB:
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      return 1;

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   case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
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      return screen->info.have_EXT_shader_viewport_index_layer ||
             (screen->info.feats12.shaderOutputLayer &&
              screen->info.feats12.shaderOutputViewportIndex);
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   case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
   case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
      return 1;

   case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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      return screen->info.props.limits.minStorageBufferOffsetAlignment;
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   case PIPE_CAP_PCI_GROUP:
   case PIPE_CAP_PCI_BUS:
   case PIPE_CAP_PCI_DEVICE:
   case PIPE_CAP_PCI_FUNCTION:
      return 0; /* TODO: figure these out */

   case PIPE_CAP_CULL_DISTANCE:
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      return screen->info.feats.features.shaderCullDistance;
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   case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
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      return screen->info.props.limits.viewportSubPixelBits;
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   case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
      return 0; /* not sure */

   case PIPE_CAP_MAX_GS_INVOCATIONS:
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      return screen->info.props.limits.maxGeometryShaderInvocations;
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   case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
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      /* gallium handles this automatically */
      return 0;
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   case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
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      /* 1<<27 is required by VK spec */
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      assert(screen->info.props.limits.maxStorageBufferRange >= 1 << 27);
      /* but Gallium can't handle values that are too big, so clamp to VK spec minimum */
      return 1 << 27;
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   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
      return 1;

   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
      return 0;

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   case PIPE_CAP_NIR_COMPACT_ARRAYS:
      return 1;

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   case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
      return 1;

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   case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
      return 1;

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   case PIPE_CAP_FLATSHADE:
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   case PIPE_CAP_ALPHA_TEST:
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   case PIPE_CAP_CLIP_PLANES:
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   case PIPE_CAP_POINT_SIZE_FIXED:
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   case PIPE_CAP_TWO_SIDED_COLOR:
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      return 0;

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   case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
      return screen->info.props.limits.maxTessellationControlPerVertexOutputComponents / 4;
   case PIPE_CAP_MAX_VARYINGS:
      /* need to reserve up to 60 of our varying components and 16 slots for streamout */
      return MIN2(screen->info.props.limits.maxVertexOutputComponents / 4 / 2, 16);

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   case PIPE_CAP_DMABUF:
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      return screen->info.have_KHR_external_memory_fd;
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   case PIPE_CAP_DEPTH_BOUNDS_TEST:
      return screen->info.feats.features.depthBounds;

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   case PIPE_CAP_POST_DEPTH_COVERAGE:
      return screen->info.have_EXT_post_depth_coverage;

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   default:
      return u_pipe_screen_get_param_defaults(pscreen, param);
   }
}

static float
zink_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
{
   struct zink_screen *screen = zink_screen(pscreen);

   switch (param) {
   case PIPE_CAPF_MAX_LINE_WIDTH:
   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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      if (!screen->info.feats.features.wideLines)
         return 1.0f;
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      return screen->info.props.limits.lineWidthRange[1];
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   case PIPE_CAPF_MAX_POINT_WIDTH:
   case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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      if (!screen->info.feats.features.largePoints)
         return 1.0f;
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      return screen->info.props.limits.pointSizeRange[1];
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   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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      if (!screen->info.feats.features.samplerAnisotropy)
         return 1.0f;
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      return screen->info.props.limits.maxSamplerAnisotropy;
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   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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      return screen->info.props.limits.maxSamplerLodBias;
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   case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
   case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
   case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
      return 0.0f; /* not implemented */
   }

   /* should only get here on unhandled cases */
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   return 0.0f;
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}

static int
zink_get_shader_param(struct pipe_screen *pscreen,
                       enum pipe_shader_type shader,
                       enum pipe_shader_cap param)
{
   struct zink_screen *screen = zink_screen(pscreen);

   switch (param) {
   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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      switch (shader) {
      case PIPE_SHADER_FRAGMENT:
      case PIPE_SHADER_VERTEX:
         return INT_MAX;
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      case PIPE_SHADER_TESS_CTRL:
      case PIPE_SHADER_TESS_EVAL:
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         if (screen->info.feats.features.tessellationShader &&
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             screen->info.have_KHR_maintenance2)
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            return INT_MAX;
         break;
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      case PIPE_SHADER_GEOMETRY:
         if (screen->info.feats.features.geometryShader)
            return INT_MAX;
         break;

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      case PIPE_SHADER_COMPUTE:
         return INT_MAX;
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      default:
         break;
      }
      return 0;
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   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
      if (shader == PIPE_SHADER_VERTEX ||
          shader == PIPE_SHADER_FRAGMENT)
         return INT_MAX;
      return 0;

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   case PIPE_SHADER_CAP_MAX_INPUTS: {
      uint32_t max = 0;
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      switch (shader) {
      case PIPE_SHADER_VERTEX:
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         max = MIN2(screen->info.props.limits.maxVertexInputAttributes, PIPE_MAX_ATTRIBS);
         break;
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      case PIPE_SHADER_TESS_CTRL:
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         max = screen->info.props.limits.maxTessellationControlPerVertexInputComponents / 4;
         break;
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      case PIPE_SHADER_TESS_EVAL:
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         max = screen->info.props.limits.maxTessellationEvaluationInputComponents / 4;
         break;
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      case PIPE_SHADER_GEOMETRY:
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         max = screen->info.props.limits.maxGeometryInputComponents;
         break;
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      case PIPE_SHADER_FRAGMENT:
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         /* intel drivers report fewer components, but it's a value that's compatible
          * with what we need for GL, so we can still force a conformant value here
          */
         if (screen->info.driver_props.driverID == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA_KHR ||
             screen->info.driver_props.driverID == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS_KHR)
            return 32;
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         max = screen->info.props.limits.maxFragmentInputComponents / 4;
         break;
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      default:
         return 0; /* unsupported stage */
      }
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      return MIN2(max, 64); // prevent overflowing struct shader_info::inputs_read
   }
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   case PIPE_SHADER_CAP_MAX_OUTPUTS: {
      uint32_t max = 0;
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      switch (shader) {
      case PIPE_SHADER_VERTEX:
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         max = screen->info.props.limits.maxVertexOutputComponents / 4;
         break;
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      case PIPE_SHADER_TESS_CTRL:
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         max = screen->info.props.limits.maxTessellationControlPerVertexOutputComponents / 4;
         break;
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      case PIPE_SHADER_TESS_EVAL:
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         max = screen->info.props.limits.maxTessellationEvaluationOutputComponents / 4;
         break;
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      case PIPE_SHADER_GEOMETRY:
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         max = screen->info.props.limits.maxGeometryOutputComponents / 4;
         break;
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      case PIPE_SHADER_FRAGMENT:
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         max = screen->info.props.limits.maxColorAttachments;
         break;
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      default:
         return 0; /* unsupported stage */
      }
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      return MIN2(max, 64); // prevent overflowing struct shader_info::outputs_read/written
   }
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   case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
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      /* At least 16384 is guaranteed by VK spec */
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      assert(screen->info.props.limits.maxUniformBufferRange >= 16384);
      /* but Gallium can't handle values that are too big */
      return MIN2(screen->info.props.limits.maxUniformBufferRange, 1 << 31);
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   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
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      return  MIN2(screen->info.props.limits.maxPerStageDescriptorUniformBuffers,
                   PIPE_MAX_CONSTANT_BUFFERS);
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   case PIPE_SHADER_CAP_MAX_TEMPS:
      return INT_MAX;

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   case PIPE_SHADER_CAP_INTEGERS:
      return 1;

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   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
      return 1;

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   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
   case PIPE_SHADER_CAP_SUBROUTINES:
   case PIPE_SHADER_CAP_INT64_ATOMICS:
   case PIPE_SHADER_CAP_FP16:
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   case PIPE_SHADER_CAP_FP16_DERIVATIVES:
   case PIPE_SHADER_CAP_INT16:
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   case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
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      return 0; /* not implemented */

   case PIPE_SHADER_CAP_PREFERRED_IR:
      return PIPE_SHADER_IR_NIR;

   case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
      return 0; /* not implemented */

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   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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   case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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      return MIN2(MIN2(screen->info.props.limits.maxPerStageDescriptorSamplers,
                       screen->info.props.limits.maxPerStageDescriptorSampledImages),
                  PIPE_MAX_SAMPLERS);
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   case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
      return 0; /* not implemented */

   case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
      return 0; /* no idea */

   case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
      return 32; /* arbitrary */

   case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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      switch (shader) {
      case PIPE_SHADER_VERTEX:
      case PIPE_SHADER_TESS_CTRL:
      case PIPE_SHADER_TESS_EVAL:
      case PIPE_SHADER_GEOMETRY:
         if (!screen->info.feats.features.vertexPipelineStoresAndAtomics)
            return 0;
         break;

      case PIPE_SHADER_FRAGMENT:
         if (!screen->info.feats.features.fragmentStoresAndAtomics)
            return 0;
         break;

      default:
         break;
      }

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      /* TODO: this limitation is dumb, and will need some fixes in mesa */
      return MIN2(screen->info.props.limits.maxPerStageDescriptorStorageBuffers, PIPE_MAX_SHADER_BUFFERS);
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   case PIPE_SHADER_CAP_SUPPORTED_IRS:
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      return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
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   case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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      if ((screen->info.have_KHR_vulkan_memory_model || !screen->needs_vk_mem_model) &&
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          (screen->info.feats.features.shaderStorageImageExtendedFormats ||
          (screen->info.feats.features.shaderStorageImageWriteWithoutFormat &&
           screen->info.feats.features.shaderStorageImageReadWithoutFormat)))
         return MIN2(screen->info.props.limits.maxPerStageDescriptorStorageImages,
                     PIPE_MAX_SHADER_IMAGES);
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      return 0;
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   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
   case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
      return 0; /* unsure */

   case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
      return 0; /* not implemented */
   }

   /* should only get here on unhandled cases */
   return 0;
}

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static VkSampleCountFlagBits
vk_sample_count_flags(uint32_t sample_count)
{
   switch (sample_count) {
   case 1: return VK_SAMPLE_COUNT_1_BIT;
   case 2: return VK_SAMPLE_COUNT_2_BIT;
   case 4: return VK_SAMPLE_COUNT_4_BIT;
   case 8: return VK_SAMPLE_COUNT_8_BIT;
   case 16: return VK_SAMPLE_COUNT_16_BIT;
   case 32: return VK_SAMPLE_COUNT_32_BIT;
   case 64: return VK_SAMPLE_COUNT_64_BIT;
   default:
      return 0;
   }
}

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static bool
zink_is_format_supported(struct pipe_screen *pscreen,
                         enum pipe_format format,
                         enum pipe_texture_target target,
                         unsigned sample_count,
                         unsigned storage_sample_count,
                         unsigned bind)
{
   struct zink_screen *screen = zink_screen(pscreen);

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   if (format == PIPE_FORMAT_NONE)
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      return screen->info.props.limits.framebufferNoAttachmentsSampleCounts &
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             vk_sample_count_flags(sample_count);
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   VkFormat vkformat = zink_get_format(screen, format);
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   if (vkformat == VK_FORMAT_UNDEFINED)
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      return false;
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   if (sample_count >= 1) {
      VkSampleCountFlagBits sample_mask = vk_sample_count_flags(sample_count);
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      if (!sample_mask)
         return false;
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      const struct util_format_description *desc = util_format_description(format);
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      if (util_format_is_depth_or_stencil(format)) {
         if (util_format_has_depth(desc)) {
            if (bind & PIPE_BIND_DEPTH_STENCIL &&
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                (screen->info.props.limits.framebufferDepthSampleCounts & sample_mask) != sample_mask)
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               return false;
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            if (bind & PIPE_BIND_SAMPLER_VIEW &&
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                (screen->info.props.limits.sampledImageDepthSampleCounts & sample_mask) != sample_mask)
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               return false;
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         }
         if (util_format_has_stencil(desc)) {
            if (bind & PIPE_BIND_DEPTH_STENCIL &&
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                (screen->info.props.limits.framebufferStencilSampleCounts & sample_mask) != sample_mask)
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               return false;
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            if (bind & PIPE_BIND_SAMPLER_VIEW &&
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                (screen->info.props.limits.sampledImageStencilSampleCounts & sample_mask) != sample_mask)
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               return false;
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         }
      } else if (util_format_is_pure_integer(format)) {
         if (bind & PIPE_BIND_RENDER_TARGET &&
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             !(screen->info.props.limits.framebufferColorSampleCounts & sample_mask))
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            return false;
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         if (bind & PIPE_BIND_SAMPLER_VIEW &&
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             !(screen->info.props.limits.sampledImageIntegerSampleCounts & sample_mask))
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            return false;
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      } else {
         if (bind & PIPE_BIND_RENDER_TARGET &&
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             !(screen->info.props.limits.framebufferColorSampleCounts & sample_mask))
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            return false;
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         if (bind & PIPE_BIND_SAMPLER_VIEW &&
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             !(screen->info.props.limits.sampledImageColorSampleCounts & sample_mask))
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            return false;
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      }
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      if (bind & PIPE_BIND_SHADER_IMAGE) {
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          if (!(screen->info.props.limits.storageImageSampleCounts & sample_mask))
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             return false;
      }
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   }

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   VkFormatProperties props = screen->format_props[format];
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   if (target == PIPE_BUFFER) {
      if (bind & PIPE_BIND_VERTEX_BUFFER &&
          !(props.bufferFeatures & VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT))
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         return false;
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      if (bind & PIPE_BIND_SAMPLER_VIEW) {
         if (!(props.bufferFeatures & VK_FORMAT_FEATURE_UNIFORM_TEXEL_BUFFER_BIT))
            return false;
         /* we can't swizzle these, so we can't sample from them either */
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         if (util_format_is_argb(format) || util_format_is_abgr(format) ||
             util_format_is_xrgb(format) || util_format_is_xbgr(format))
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            return false;
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      }
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      if (bind & PIPE_BIND_SHADER_IMAGE &&
          !(props.bufferFeatures & VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT))
         return false;
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   } else {
      /* all other targets are texture-targets */
      if (bind & PIPE_BIND_RENDER_TARGET &&
          !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT))
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         return false;
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      if (bind & PIPE_BIND_BLENDABLE &&
         !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT))
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        return false;
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      if (bind & PIPE_BIND_SAMPLER_VIEW &&
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         !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT))
            return false;

      if ((bind & PIPE_BIND_SAMPLER_VIEW) || (bind & PIPE_BIND_RENDER_TARGET)) {
         /* if this is a 3-component texture, force gallium to give us 4 components by rejecting this one */
         const struct util_format_description *desc = util_format_description(format);
         if (desc->nr_channels == 3 &&
             (desc->block.bits == 24 || desc->block.bits == 48 || desc->block.bits == 96))
            return false;
      }
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      if (bind & PIPE_BIND_DEPTH_STENCIL &&
          !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT))
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         return false;
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      if (bind & PIPE_BIND_SHADER_IMAGE &&
          !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT))
         return false;
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   }

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   if (util_format_is_compressed(format)) {
      const struct util_format_description *desc = util_format_description(format);
      if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC &&
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          !screen->info.feats.features.textureCompressionBC)
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         return false;
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   }
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   return true;
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}

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static void
resource_cache_entry_destroy(struct zink_screen *screen, struct hash_entry *he)
{
   struct util_dynarray *array = (void*)he->data;
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   util_dynarray_foreach(array, struct mem_cache_entry, mc) {
      vkFreeMemory(screen->dev, mc->mem, NULL);
   }
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   util_dynarray_fini(array);
}

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static void
zink_destroy_screen(struct pipe_screen *pscreen)
{
   struct zink_screen *screen = zink_screen(pscreen);
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   if (VK_NULL_HANDLE != screen->debugUtilsCallbackHandle) {
      screen->vk_DestroyDebugUtilsMessengerEXT(screen->instance, screen->debugUtilsCallbackHandle, NULL);
   }

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   hash_table_foreach(&screen->surface_cache, entry) {
      struct pipe_surface *psurf = (struct pipe_surface*)entry->data;
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      /* context is already destroyed, so this has to be destroyed directly */
      zink_destroy_surface(screen, psurf);
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   }

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   hash_table_foreach(&screen->bufferview_cache, entry) {
      struct zink_buffer_view *bv = (struct zink_buffer_view*)entry->data;
      zink_buffer_view_reference(screen, &bv, NULL);
   }

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   hash_table_foreach(&screen->framebuffer_cache, entry) {
      struct zink_framebuffer* fb = (struct zink_framebuffer*)entry->data;
      zink_destroy_framebuffer(screen, fb);
   }

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   simple_mtx_destroy(&screen->surface_mtx);
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   simple_mtx_destroy(&screen->bufferview_mtx);
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   simple_mtx_destroy(&screen->framebuffer_mtx);
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   u_transfer_helper_destroy(pscreen->transfer_helper);
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   zink_screen_update_pipeline_cache(screen);
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#ifdef ENABLE_SHADER_CACHE
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   if (screen->disk_cache)
      disk_cache_wait_for_idle(screen->disk_cache);
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#endif
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   disk_cache_destroy(screen->disk_cache);
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   simple_mtx_lock(&screen->mem_cache_mtx);
   hash_table_foreach(screen->resource_mem_cache, he)
      resource_cache_entry_destroy(screen, he);
   _mesa_hash_table_destroy(screen->resource_mem_cache, NULL);
   simple_mtx_unlock(&screen->mem_cache_mtx);
   simple_mtx_destroy(&screen->mem_cache_mtx);
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   vkDestroyPipelineCache(screen->dev, screen->pipeline_cache, NULL);
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   vkDestroyDevice(screen->dev, NULL);
   vkDestroyInstance(screen->instance, NULL);

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   slab_destroy_parent(&screen->transfer_pool);
992
   ralloc_free(screen);
993
994
}

995
996
static void
choose_pdev(struct zink_screen *screen)
997
998
{
   uint32_t i, pdev_count;
999
1000
   VkPhysicalDevice *pdevs;
   VkResult result = vkEnumeratePhysicalDevices(screen->instance, &pdev_count, NULL);
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