drm/i915 feature pull for v6.11: Features and functionality: - Battlemage (BMG) Xe2 HPD display enabling (Balasubramani, Clint, Gustavo, José, Matt, Anusha, Lucas, Ravi, Radhakrishna, Nirmoy, Ankit, Matthew) - Panel Replay enabling (Jouni, Animesh) - DP AUX-less ALPM (Advanced Link Power Management) and LOBF (Link off between frames) enabling (Animesh, Jouni) - Enable link training failure fallback for DP MST links (Imre) - CMRR (Content Match Refresh Rate) enabling (Mitul) - Allow the first async flip to change modifier (Ville) - Enable eDP AUX based HDR backlight (Suraj) - Increase ADL-S/ADL-P/DG2+ max TMDS bitrate to 6 Gbps (Ville) Refactoring and cleanups: - Stop using implicit dev_priv local variable in macros (Jani) - Expand and clean up VBT table definitions (Ville) - PSR/ALPM refactoring (Jouni, Animesh) - Plane fb refactoring (Ville) - Rawclk, FSB, and mem frequency refactoring (Jani) - GVT register macro usage cleanups (Jani, Ville) - Plane, cursor, wm and ddb register macro and usage cleanups (Ville) - Pipe CRC register macro cleanups (Ville) - PCI ID macro cleanups and refactoring to match xe style (Jani) - Move drm-intel repo to gitlab.freedesktop.org (Ryszard) - Identify all platforms/subplatforms in display probe (Jani) - Move Intel drm headers under include/drm/intel (Jani) - Drop local redundant W=1 warnings in favour of drm subsystem warnigs (Jani) - Include cleanups; include what you use (Jani) - Convert overlay and DMC error state printing to drm_printer (Jani) - Joiner renames (Stan) - DSB interface cleanups (Ville) - Improve workaround for disabling FBC when VT-d is active (Vinod) - State checker refactoring and cleanups for color, planes and cdclk (Ville) - Cleanups around scanline arithmetic (Ville) - Use drm_crtc_vblank_crtc() instead of open coding (Ville) - DSC cleanups (Ville) Fixes: - Improve VBT array bounds check (Luca) - LNL PSR fixes (Jouni) - Audio workaround, disable min hblank fix (Uma) - Stop selecting ACPI_BUTTON config (Jani) - Add MTL Cx0 PHY config compare (Mika) - Fix MTL C20 PHY port clock verification (Mika) - Fix static analyzer warning for uapi.event access (Luca) - HDCP fixes and workarounds (Suraj) - Fix DP MST DSC input BPP computation (Imre) - Fix assert on pending async-put power domain work (Imre) - Fix documentation build for DMC wakelocks (Luca) - Disable DSC on eDP when indicated by VBT (Ville) DRM Core changes: - Various DPCD register additions for panel replay and ALPM (Jouni) - Add target_rr_divider to adaptive sync SDP (Mitul) Xe driver changes: - Remove unused xe->enabled_irq_mask and xe->sb_lock members (Jani) - i915 display compat header cleanups (Jani) - Remove redundant copy of intel_fbdev_fb.h (Ville) - Add process name to devcoredump (José) - Add xe_gt_err_once() (Matthew) - Implement transient flush for BMG/Xe3 (Nirmoy) Merges: - Backmerges to sync with xe, drm-misc and upstream (Rodrigo, Jani)