Commit 8c7daa14 authored by Connor Behan's avatar Connor Behan

Restore PLL0 as well as PLL3

Apparently, the text mode driver can use either register to store the
pixel clock. The assumption made previously was apparently corrupting
the console on PowerPC systems. Thanks to Michael Lorenz for the patch.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=32606Signed-off-by: Connor Behan's avatarConnor Behan <connor.behan@gmail.com>
parent bfff4014
......@@ -225,6 +225,7 @@ typedef struct {
/* PLL registers */
uint32_t ppll_ref_div;
uint32_t ppll_div_3;
uint32_t ppll_div_0;
uint32_t htotal_cntl;
/* Computed values for PLL2 */
......
......@@ -2332,6 +2332,15 @@ void R128RestorePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
R128PLLWriteUpdate(pScrn);
R128PLLWaitForReadUpdateComplete(pScrn);
OUTPLLP(pScrn, R128_PPLL_DIV_0,
restore->ppll_div_0, ~R128_PPLL_FB0_DIV_MASK);
/* R128PLLWriteUpdate(pScrn);*/
OUTPLLP(pScrn, R128_PPLL_DIV_0,
restore->ppll_div_0, ~R128_PPLL_POST0_DIV_MASK);
R128PLLWriteUpdate(pScrn);
R128PLLWaitForReadUpdateComplete(pScrn);
OUTPLL(R128_HTOTAL_CNTL, restore->htotal_cntl);
/* R128PLLWriteUpdate(pScrn);*/
......@@ -2527,6 +2536,7 @@ static void R128SavePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
{
save->ppll_ref_div = INPLL(pScrn, R128_PPLL_REF_DIV);
save->ppll_div_3 = INPLL(pScrn, R128_PPLL_DIV_3);
save->ppll_div_0 = INPLL(pScrn, R128_PPLL_DIV_0);
save->htotal_cntl = INPLL(pScrn, R128_HTOTAL_CNTL);
R128TRACE(("Read: 0x%08x 0x%08x 0x%08x\n",
......
......@@ -905,6 +905,8 @@
# define R128_PPLL_ATOMIC_UPDATE_EN (1 << 16)
# define R128_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
#define R128_PPLL_DIV_0 0x0004 /* PLL */
# define R128_PPLL_FB0_DIV_MASK 0x07ff
# define R128_PPLL_POST0_DIV_MASK 0x00070000
#define R128_PPLL_DIV_1 0x0005 /* PLL */
#define R128_PPLL_DIV_2 0x0006 /* PLL */
#define R128_PPLL_DIV_3 0x0007 /* PLL */
......
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