Commit e8db8584 authored by Zhenyu Wang's avatar Zhenyu Wang

xvmc: attempt to move batch buffer code out of i915 private

parent 11c0e0db
......@@ -43,9 +43,18 @@
#define XVMC_I965_MPEG2_VLD 0x08
/* common header for context private */
struct hwmc_buffer
{
drm_handle_t handle;
unsigned long offset;
unsigned long size;
unsigned long bus_addr;
};
struct _intel_xvmc_common {
unsigned int type;
unsigned int sarea_size;
struct hwmc_buffer batchbuffer;
};
#ifdef _INTEL_XVMC_SERVER_
......@@ -55,6 +64,9 @@ struct intel_xvmc_driver {
char *name;
XF86MCAdaptorPtr adaptor;
unsigned int flag;
i830_memory *batch;
drm_handle_t batch_handle;
/* more items for xvmv surface manage? */
Bool (*init)(ScrnInfoPtr, XF86VideoAdaptorPtr);
void (*fini)(ScrnInfoPtr);
......
......@@ -83,8 +83,6 @@ typedef struct _I915XvMCContextPriv
drm_handle_t psc_handle;
i830_memory *mcCorrdata;
drm_handle_t corrdata_handle;
i830_memory *mcBatchBuffer;
drm_handle_t batchbuffer_handle;
} I915XvMCContextPriv;
typedef struct _I915XvMC
......@@ -296,9 +294,9 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpri
}
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)(ctxpriv->mcBatchBuffer->offset + pI830->LinearAddr),
ctxpriv->mcBatchBuffer->size, DRM_AGP, 0,
(drmAddress)&ctxpriv->batchbuffer_handle) < 0) {
(drm_handle_t)(xvmc_driver->batch->offset + pI830->LinearAddr),
xvmc_driver->batch->size, DRM_AGP, 0,
&xvmc_driver->batch_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(batchbuffer_handle) failed!\n");
return FALSE;
......@@ -341,9 +339,9 @@ static void i915_unmap_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxp
ctxpriv->corrdata_handle = 0;
}
if (ctxpriv->batchbuffer_handle) {
drmRmMap(pI830->drmSubFD, ctxpriv->batchbuffer_handle);
ctxpriv->batchbuffer_handle = 0;
if (xvmc_driver->batch_handle) {
drmRmMap(pI830->drmSubFD, xvmc_driver->batch_handle);
xvmc_driver->batch_handle = 0;
}
}
......@@ -393,7 +391,7 @@ static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *c
}
if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]batch buffer",
&(ctxpriv->mcBatchBuffer), 8 * 1024,
&(xvmc_driver->batch), 8 * 1024,
ALIGN_BOTH_ENDS)) {
return FALSE;
}
......@@ -434,9 +432,9 @@ static void i915_free_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpr
ctxpriv->mcCorrdata = NULL;
}
if (ctxpriv->mcBatchBuffer) {
i830_free_memory(pScrn, ctxpriv->mcBatchBuffer);
ctxpriv->mcBatchBuffer = NULL;
if (xvmc_driver->batch) {
i830_free_memory(pScrn, xvmc_driver->batch);
xvmc_driver->batch = NULL;
}
}
......@@ -528,8 +526,14 @@ static int I915XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext,
return BadAlloc;
}
/* common context items */
contextRec->comm.type = xvmc_driver->flag;
contextRec->comm.sarea_size = pDRIInfo->SAREASize;
contextRec->comm.batchbuffer.offset = xvmc_driver->batch->offset;
contextRec->comm.batchbuffer.size = xvmc_driver->batch->size;
contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
/* i915 private context */
contextRec->ctxno = i;
contextRec->sis.handle = ctxpriv->sis_handle;
contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset;
......@@ -554,9 +558,6 @@ static int I915XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext,
contextRec->corrdata.handle = ctxpriv->corrdata_handle;
contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset;
contextRec->corrdata.size = ctxpriv->mcCorrdata->size;
contextRec->batchbuffer.handle = ctxpriv->batchbuffer_handle;
contextRec->batchbuffer.offset = ctxpriv->mcBatchBuffer->offset;
contextRec->batchbuffer.size = ctxpriv->mcBatchBuffer->size;
contextRec->sarea_priv_offset = sizeof(XF86DRISAREARec);
contextRec->depth = pScrn->bitsPerPixel;
contextRec->deviceID = pI830DRI->deviceID;
......
......@@ -47,15 +47,8 @@ typedef struct
int real_id;
} I915XvMCCommandBuffer;
struct hwmc_buffer
{
drm_handle_t handle;
unsigned long offset;
unsigned long size;
unsigned long bus_addr;
};
typedef struct
typedef struct
{
struct _intel_xvmc_common comm;
unsigned int ctxno; /* XvMC private context reference number */
......@@ -65,7 +58,6 @@ typedef struct
struct hwmc_buffer psp;
struct hwmc_buffer psc;
struct hwmc_buffer corrdata;/* Correction Data Buffer */
struct hwmc_buffer batchbuffer;
unsigned int sarea_priv_offset;
unsigned int depth;
int deviceID;
......
......@@ -31,7 +31,6 @@
#include "I915XvMC.h"
#include "i915_structs.h"
#include "i915_program.h"
#include "intel_batchbuffer.h"
#define SAREAPTR(ctx) ((drmI830Sarea *) \
(((CARD8 *)(ctx)->sarea_address) + \
......@@ -204,7 +203,7 @@ static void UNLOCK_HARDWARE(i915XvMCContext *pI915XvMC)
PPTHREAD_MUTEX_UNLOCK(pI915XvMC);
}
static void i915_flush(i915XvMCContext *pI915XvMC, int map, int render)
static void i915_flush(int map, int render)
{
struct i915_mi_flush mi_flush;
......@@ -214,7 +213,7 @@ static void i915_flush(i915XvMCContext *pI915XvMC, int map, int render)
mi_flush.dw0.map_cache_invalidate = map;
mi_flush.dw0.render_cache_flush_inhibit = render;
intelBatchbufferData(pI915XvMC, &mi_flush, sizeof(mi_flush), 0);
intelBatchbufferData(&mi_flush, sizeof(mi_flush), 0);
}
/* for MC picture rendering */
......@@ -539,14 +538,13 @@ static void i915_mc_load_sis_msb_buffers(XvMCContext *context)
else
msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2);
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
}
static void i915_mc_mpeg_set_origin(XvMCContext *context, XvMCMacroBlock *mb)
{
struct i915_3dmpeg_set_origin set_origin;
i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
/* 3DMPEG_SET_ORIGIN */
memset(&set_origin, 0, sizeof(set_origin));
......@@ -556,13 +554,12 @@ static void i915_mc_mpeg_set_origin(XvMCContext *context, XvMCMacroBlock *mb)
set_origin.dw1.h_origin = mb->x;
set_origin.dw1.v_origin = mb->y;
intelBatchbufferData(pI915XvMC, &set_origin, sizeof(set_origin), 0);
intelBatchbufferData(&set_origin, sizeof(set_origin), 0);
}
static void i915_mc_mpeg_macroblock_ipicture(XvMCContext *context, XvMCMacroBlock *mb)
{
struct i915_3dmpeg_macroblock_ipicture macroblock_ipicture;
i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
/* 3DMPEG_MACROBLOCK_IPICTURE */
memset(&macroblock_ipicture, 0, sizeof(macroblock_ipicture));
......@@ -570,14 +567,13 @@ static void i915_mc_mpeg_macroblock_ipicture(XvMCContext *context, XvMCMacroBloc
macroblock_ipicture.dw0.opcode = OPC_3DMPEG_MACROBLOCK_IPICTURE;
macroblock_ipicture.dw0.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD);
intelBatchbufferData(pI915XvMC, &macroblock_ipicture, sizeof(macroblock_ipicture), 0);
intelBatchbufferData(&macroblock_ipicture, sizeof(macroblock_ipicture), 0);
}
static void i915_mc_mpeg_macroblock_0mv(XvMCContext *context, XvMCMacroBlock *mb)
{
struct i915_3dmpeg_macroblock_0mv macroblock_0mv;
i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
/* 3DMPEG_MACROBLOCK(0mv) */
memset(&macroblock_0mv, 0, sizeof(macroblock_0mv));
......@@ -600,13 +596,12 @@ static void i915_mc_mpeg_macroblock_0mv(XvMCContext *context, XvMCMacroBlock *mb
macroblock_0mv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
macroblock_0mv.header.dw1.skipped_macroblocks = 0;
intelBatchbufferData(pI915XvMC, &macroblock_0mv, sizeof(macroblock_0mv), 0);
intelBatchbufferData(&macroblock_0mv, sizeof(macroblock_0mv), 0);
}
static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext *context, XvMCMacroBlock *mb)
{
struct i915_3dmpeg_macroblock_1fbmv macroblock_1fbmv;
i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
/* Motion Vectors */
su_t fmv;
......@@ -639,7 +634,7 @@ static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext *context, XvMCMacroBlock *
macroblock_1fbmv.dw2 = fmv.u[0];
macroblock_1fbmv.dw3 = bmv.u[0];
intelBatchbufferData(pI915XvMC, &macroblock_1fbmv, sizeof(macroblock_1fbmv), 0);
intelBatchbufferData(&macroblock_1fbmv, sizeof(macroblock_1fbmv), 0);
}
static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext *context, XvMCMacroBlock *mb, unsigned int ps)
......@@ -706,7 +701,7 @@ static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext *context, XvMCMacroBlock *
macroblock_2fbmv.dw4 = fmv.u[1];
macroblock_2fbmv.dw5 = bmv.u[1];
intelBatchbufferData(pI915XvMC, &macroblock_2fbmv, sizeof(macroblock_2fbmv), 0);
intelBatchbufferData(&macroblock_2fbmv, sizeof(macroblock_2fbmv), 0);
}
/* for MC context initialization */
......@@ -1032,7 +1027,7 @@ static void i915_mc_one_time_state_initialization(XvMCContext *context)
s6->color_buffer_write = 1;
s6->triangle_pv = 0;
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
/* 3DSTATE_LOAD_INDIRECT */
......@@ -1091,7 +1086,7 @@ static void i915_mc_one_time_state_initialization(XvMCContext *context)
else
psc->dw0.buffer_address = (pI915XvMC->psc.bus_addr >> 2);
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
}
......@@ -1199,7 +1194,7 @@ static void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsigned
ptr = ++psc;
}
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
}
......@@ -1247,10 +1242,11 @@ static int i915_xvmc_map_buffers(i915XvMCContext *pI915XvMC)
return -1;
}
/* XXX */
if (drmMap(xvmc_driver->fd,
pI915XvMC->batchbuffer.handle,
pI915XvMC->batchbuffer.size,
(drmAddress *)&pI915XvMC->batchbuffer.map) != 0) {
xvmc_driver->batchbuffer.handle,
xvmc_driver->batchbuffer.size,
(drmAddress *)&xvmc_driver->batchbuffer.map) != 0) {
return -1;
}
......@@ -1289,9 +1285,9 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext *pI915XvMC)
pI915XvMC->corrdata.map = NULL;
}
if (pI915XvMC->batchbuffer.map) {
drmUnmap(pI915XvMC->batchbuffer.map, pI915XvMC->batchbuffer.size);
pI915XvMC->batchbuffer.map = NULL;
if (xvmc_driver->batchbuffer.map) {
drmUnmap(xvmc_driver->batchbuffer.map, xvmc_driver->batchbuffer.size);
xvmc_driver->batchbuffer.map = NULL;
}
}
......@@ -1618,7 +1614,7 @@ static void i915_yuv2rgb_proc(XvMCSurface *surface)
s6->color_buffer_write = 1;
s7 = (struct s7_dword *)(++s6);
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
/* 3DSTATE_3DSTATE_SCISSOR_RECTANGLE */
......@@ -1629,7 +1625,7 @@ static void i915_yuv2rgb_proc(XvMCSurface *surface)
scissor_rectangle.dw1.min_y = 0;
scissor_rectangle.dw2.max_x = 2047;
scissor_rectangle.dw2.max_y = 2047;
intelBatchbufferData(pI915XvMC, &scissor_rectangle, sizeof(scissor_rectangle), 0);
intelBatchbufferData(&scissor_rectangle, sizeof(scissor_rectangle), 0);
/* 3DSTATE_LOAD_INDIRECT */
size = sizeof(*load_indirect) + sizeof(*sis) + sizeof(*ssb) + sizeof(*msb) + sizeof(*psp);
......@@ -1669,7 +1665,7 @@ static void i915_yuv2rgb_proc(XvMCSurface *surface)
psp->dw1.length = ((sizeof(struct i915_3dstate_pixel_shader_program) +
sizeof(union shader_inst)) >> 2) - 1;
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
/* 3DPRIMITIVE */
......@@ -1706,7 +1702,7 @@ static void i915_yuv2rgb_proc(XvMCSurface *surface)
vd->tc1.tcx = 0;
vd->tc1.tcy = 0;
intelBatchbufferData(pI915XvMC, base, size, 0);
intelBatchbufferData(base, size, 0);
free(base);
}
......@@ -1735,7 +1731,7 @@ static void i915_release_resource(Display *display, XvMCContext *context)
uniDRIDestroyContext(display, screen, pI915XvMC->id);
XUnlockDisplay(display);
intelDestroyBatchBuffer(pI915XvMC);
intelDestroyBatchBuffer();
drmUnmap(xvmc_driver->sarea_address, xvmc_driver->sarea_size);
......@@ -1815,9 +1811,6 @@ static Status i915_xvmc_mc_create_context(Display *display, XvMCContext *context
pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
pI915XvMC->corrdata.offset = tmpComm->corrdata.offset;
pI915XvMC->corrdata.size = tmpComm->corrdata.size;
pI915XvMC->batchbuffer.handle = tmpComm->batchbuffer.handle;
pI915XvMC->batchbuffer.offset = tmpComm->batchbuffer.offset;
pI915XvMC->batchbuffer.size = tmpComm->batchbuffer.size;
pI915XvMC->sarea_priv_offset = tmpComm->sarea_priv_offset;
pI915XvMC->depth = tmpComm->depth;
......@@ -1872,9 +1865,8 @@ static Status i915_xvmc_mc_create_context(Display *display, XvMCContext *context
pI915XvMC->last_flip = 0;
pI915XvMC->locked = 0;
pI915XvMC->port = context->port;
pthread_mutex_init(&pI915XvMC->ctxmutex, NULL);
/* XXX */
intelInitBatchBuffer(pI915XvMC);
pthread_mutex_init(&pI915XvMC->ctxmutex, NULL);
pI915XvMC->ref = 1;
return Success;
}
......@@ -2160,7 +2152,7 @@ static int i915_xvmc_mc_render_surface(Display *display, XvMCContext *context,
corrdata_ptr += bspm;
}
i915_flush(pI915XvMC, 1, 0);
i915_flush(1, 0);
// i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
// | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
......@@ -2221,9 +2213,9 @@ static int i915_xvmc_mc_render_surface(Display *display, XvMCContext *context,
} /* Field Picture */
}
intelFlushBatch(pI915XvMC, TRUE);
pI915XvMC->last_render = pI915XvMC->alloc.irq_emitted;
privTarget->last_render = pI915XvMC->last_render;
intelFlushBatch(TRUE);
xvmc_driver->last_render = xvmc_driver->alloc.irq_emitted;
privTarget->last_render = xvmc_driver->last_render;
UNLOCK_HARDWARE(pI915XvMC);
return 0;
......
......@@ -63,7 +63,6 @@ typedef struct _i915XvMCDrmMap {
***************************************************************************/
typedef struct _i915XvMCContext {
unsigned int ctxno;
unsigned int last_render;
unsigned int last_flip;
unsigned int dual_prime; /* Flag to identify when dual prime is in use. */
unsigned int yStride;
......@@ -97,25 +96,9 @@ typedef struct _i915XvMCContext {
i915XvMCDrmMap psc;
i915XvMCDrmMap corrdata;
i915XvMCDrmMap batchbuffer;
sigset_t sa_mask;
struct {
unsigned int start_offset;
unsigned int size;
unsigned int space;
unsigned char *ptr;
} batch;
struct
{
void *ptr;
unsigned int size;
unsigned int offset;
unsigned int active_buf;
unsigned int irq_emitted;
} alloc;
} i915XvMCContext;
/***************************************************************************
......
......@@ -43,12 +43,12 @@
#include <X11/extensions/XvMC.h>
#include <X11/extensions/XvMClib.h>
#include "I915XvMC.h"
#include "intel_xvmc.h"
#include "intel_batchbuffer.h"
#define MI_BATCH_BUFFER_END (0xA << 23)
int intelEmitIrqLocked(i915XvMCContext *pI915XvMC)
int intelEmitIrqLocked(void)
{
drmI830IrqEmit ie;
int ret, seq;
......@@ -65,7 +65,7 @@ int intelEmitIrqLocked(i915XvMCContext *pI915XvMC)
return seq;
}
void intelWaitIrq(i915XvMCContext *pI915XvMC, int seq)
void intelWaitIrq(int seq)
{
int ret;
drmI830IrqWait iw;
......@@ -82,137 +82,136 @@ void intelWaitIrq(i915XvMCContext *pI915XvMC, int seq)
}
}
void intelDestroyBatchBuffer(i915XvMCContext *pI915XvMC)
void intelDestroyBatchBuffer(void)
{
if (pI915XvMC->alloc.offset) {
pI915XvMC->alloc.ptr = NULL;
pI915XvMC->alloc.offset = 0;
} else if (pI915XvMC->alloc.ptr) {
free(pI915XvMC->alloc.ptr);
pI915XvMC->alloc.ptr = NULL;
if (xvmc_driver->alloc.offset) {
xvmc_driver->alloc.ptr = NULL;
xvmc_driver->alloc.offset = 0;
} else if (xvmc_driver->alloc.ptr) {
free(xvmc_driver->alloc.ptr);
xvmc_driver->alloc.ptr = NULL;
}
memset(&pI915XvMC->batch, 0, sizeof(pI915XvMC->batch));
memset(&xvmc_driver->batch, 0, sizeof(xvmc_driver->batch));
}
void intelInitBatchBuffer(i915XvMCContext *pI915XvMC)
void intelInitBatchBuffer(void)
{
if (pI915XvMC->batchbuffer.map) {
pI915XvMC->alloc.size = pI915XvMC->batchbuffer.size;
pI915XvMC->alloc.offset = pI915XvMC->batchbuffer.offset;
pI915XvMC->alloc.ptr = pI915XvMC->batchbuffer.map;
if (xvmc_driver->batchbuffer.map) {
xvmc_driver->alloc.size = xvmc_driver->batchbuffer.size;
xvmc_driver->alloc.offset = xvmc_driver->batchbuffer.offset;
xvmc_driver->alloc.ptr = xvmc_driver->batchbuffer.map;
} else {
pI915XvMC->alloc.size = 8 * 1024;
pI915XvMC->alloc.offset = 0;
pI915XvMC->alloc.ptr = malloc(pI915XvMC->alloc.size);
xvmc_driver->alloc.size = 8 * 1024;
xvmc_driver->alloc.offset = 0;
xvmc_driver->alloc.ptr = malloc(xvmc_driver->alloc.size);
}
pI915XvMC->alloc.active_buf = 0;
assert(pI915XvMC->alloc.ptr);
xvmc_driver->alloc.active_buf = 0;
assert(xvmc_driver->alloc.ptr);
}
void intelBatchbufferRequireSpace(i915XvMCContext *pI915XvMC, unsigned sz)
void intelBatchbufferRequireSpace(unsigned int sz)
{
if (pI915XvMC->batch.space < sz)
intelFlushBatch(pI915XvMC, TRUE);
if (xvmc_driver->batch.space < sz)
intelFlushBatch(TRUE);
}
void intelBatchbufferData(i915XvMCContext *pI915XvMC, const void *data,
unsigned bytes, unsigned flags)
void intelBatchbufferData(const void *data, unsigned bytes, unsigned flags)
{
assert((bytes & 0x3) == 0);
intelBatchbufferRequireSpace(pI915XvMC, bytes);
memcpy(pI915XvMC->batch.ptr, data, bytes);
pI915XvMC->batch.ptr += bytes;
pI915XvMC->batch.space -= bytes;
intelBatchbufferRequireSpace(bytes);
memcpy(xvmc_driver->batch.ptr, data, bytes);
xvmc_driver->batch.ptr += bytes;
xvmc_driver->batch.space -= bytes;
assert(pI915XvMC->batch.space >= 0);
assert(xvmc_driver->batch.space >= 0);
}
#define MI_FLUSH ((0 << 29) | (4 << 23))
#define FLUSH_MAP_CACHE (1 << 0)
#define FLUSH_RENDER_CACHE (0 << 2)
#define FLUSH_WRITE_DIRTY_STATE (1 << 4)
void intelRefillBatchLocked(i915XvMCContext *pI915XvMC, Bool allow_unlock )
void intelRefillBatchLocked(Bool allow_unlock )
{
unsigned half = pI915XvMC->alloc.size >> 1;
unsigned buf = (pI915XvMC->alloc.active_buf ^= 1);
unsigned half = xvmc_driver->alloc.size >> 1;
unsigned buf = (xvmc_driver->alloc.active_buf ^= 1);
unsigned dword[2];
dword[0] = MI_FLUSH | FLUSH_WRITE_DIRTY_STATE | FLUSH_RENDER_CACHE | FLUSH_MAP_CACHE;
dword[1] = 0;
intelCmdIoctl(pI915XvMC, (char *)&dword[0], sizeof(dword));
pI915XvMC->alloc.irq_emitted = intelEmitIrqLocked(pI915XvMC);
intelCmdIoctl((char *)&dword[0], sizeof(dword));
xvmc_driver->alloc.irq_emitted = intelEmitIrqLocked();
if (pI915XvMC->alloc.irq_emitted) {
intelWaitIrq(pI915XvMC, pI915XvMC->alloc.irq_emitted);
if (xvmc_driver->alloc.irq_emitted) {
intelWaitIrq(xvmc_driver->alloc.irq_emitted);
}
pI915XvMC->batch.start_offset = pI915XvMC->alloc.offset + buf * half;
pI915XvMC->batch.ptr = (unsigned char *)pI915XvMC->alloc.ptr + buf * half;
pI915XvMC->batch.size = half - 8;
pI915XvMC->batch.space = half - 8;
assert(pI915XvMC->batch.space >= 0);
xvmc_driver->batch.start_offset = xvmc_driver->alloc.offset + buf * half;
xvmc_driver->batch.ptr = (unsigned char *)xvmc_driver->alloc.ptr + buf * half;
xvmc_driver->batch.size = half - 8;
xvmc_driver->batch.space = half - 8;
assert(xvmc_driver->batch.space >= 0);
}
void intelFlushBatchLocked(i915XvMCContext *pI915XvMC,
Bool ignore_cliprects,
void intelFlushBatchLocked(Bool ignore_cliprects,
Bool refill,
Bool allow_unlock)
{
drmI830BatchBuffer batch;
if (pI915XvMC->batch.space != pI915XvMC->batch.size) {
if (xvmc_driver->batch.space != xvmc_driver->batch.size) {
batch.start = pI915XvMC->batch.start_offset;
batch.used = pI915XvMC->batch.size - pI915XvMC->batch.space;
batch.start = xvmc_driver->batch.start_offset;
batch.used = xvmc_driver->batch.size - xvmc_driver->batch.space;
batch.cliprects = 0;
batch.num_cliprects = 0;
batch.DR1 = 0;
batch.DR4 = 0;
if (pI915XvMC->alloc.offset) {
if (xvmc_driver->alloc.offset) {
if ((batch.used & 0x4) == 0) {
((int *)pI915XvMC->batch.ptr)[0] = 0;
((int *)pI915XvMC->batch.ptr)[1] = MI_BATCH_BUFFER_END;
((int *)xvmc_driver->batch.ptr)[0] = 0;
((int *)xvmc_driver->batch.ptr)[1] = MI_BATCH_BUFFER_END;
batch.used += 0x8;
pI915XvMC->batch.ptr += 0x8;
xvmc_driver->batch.ptr += 0x8;
} else {
((int *)pI915XvMC->batch.ptr)[0] = MI_BATCH_BUFFER_END;
((int *)xvmc_driver->batch.ptr)[0] = MI_BATCH_BUFFER_END;
batch.used += 0x4;
pI915XvMC->batch.ptr += 0x4;
xvmc_driver->batch.ptr += 0x4;
}
}
pI915XvMC->batch.start_offset += batch.used;
pI915XvMC->batch.size -= batch.used;
xvmc_driver->batch.start_offset += batch.used;
xvmc_driver->batch.size -= batch.used;
if (pI915XvMC->batch.size < 8) {
if (xvmc_driver->batch.size < 8) {
refill = TRUE;
pI915XvMC->batch.space = pI915XvMC->batch.size = 0;
xvmc_driver->batch.space = xvmc_driver->batch.size = 0;
}
else {
pI915XvMC->batch.size -= 8;
pI915XvMC->batch.space = pI915XvMC->batch.size;
xvmc_driver->batch.size -= 8;
xvmc_driver->batch.space = xvmc_driver->batch.size;
}
assert(pI915XvMC->batch.space >= 0);
assert(batch.start >= pI915XvMC->alloc.offset);
assert(batch.start < pI915XvMC->alloc.offset + pI915XvMC->alloc.size);
assert(batch.start + batch.used > pI915XvMC->alloc.offset);
assert(batch.start + batch.used <= pI915XvMC->alloc.offset + pI915XvMC->alloc.size);
assert(xvmc_driver->batch.space >= 0);
assert(batch.start >= xvmc_driver->alloc.offset);
assert(batch.start < xvmc_driver->alloc.offset + xvmc_driver->alloc.size);
assert(batch.start + batch.used > xvmc_driver->alloc.offset);
assert(batch.start + batch.used <= xvmc_driver->alloc.offset + xvmc_driver->alloc.size);
if (pI915XvMC->alloc.offset) {
if (xvmc_driver->alloc.offset) {
if (drmCommandWrite(xvmc_driver->fd, DRM_I830_BATCHBUFFER, &batch, sizeof(batch))) {
fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
exit(1);
}
} else {
drmI830CmdBuffer cmd;
cmd.buf = (char *)pI915XvMC->alloc.ptr + batch.start;
cmd.buf = (char *)xvmc_driver->alloc.ptr + batch.start;
cmd.sz = batch.used;
cmd.DR1 = batch.DR1;
cmd.DR4 = batch.DR4;
......@@ -228,15 +227,15 @@ void intelFlushBatchLocked(i915XvMCContext *pI915XvMC,
}
if (refill)
intelRefillBatchLocked(pI915XvMC, allow_unlock);
intelRefillBatchLocked(allow_unlock);
}
void intelFlushBatch(i915XvMCContext *pI915XvMC, Bool refill )
void intelFlushBatch(Bool refill )
{
intelFlushBatchLocked(pI915XvMC, FALSE, refill, TRUE);
intelFlushBatchLocked(FALSE, refill, TRUE);
}
void intelCmdIoctl(i915XvMCContext *pI915XvMC, char *buf, unsigned used)
void intelCmdIoctl(char *buf, unsigned used)
{
drmI830CmdBuffer cmd;
......
......@@ -13,10 +13,10 @@ extern int VERBOSE;
if (VERBOSE) fprintf(stderr, \
"BEGIN_BATCH(%ld) in %s, %d dwords free\n", \
((unsigned long)n), __FUNCTION__, \
pI915XvMC->batch.space/4); \
if (pI915XvMC->batch.space < (n)*4) \
intelFlushBatch(pI915XvMC, TRUE); \
batch_ptr = pI915XvMC->batch.ptr; \
xvmc_driver->batch.space/4); \
if (xvmc_driver->batch.space < (n)*4) \
intelFlushBatch(TRUE); \
batch_ptr = xvmc_driver->batch.ptr; \
} while (0)
#define OUT_BATCH(n) \
......@@ -29,14 +29,14 @@ extern int VERBOSE;
#define ADVANCE_BATCH() \
do { \
if (VERBOSE) fprintf(stderr, "ADVANCE_BATCH()\n"); \
pI915XvMC->batch.space -= (batch_ptr - pI915XvMC->batch.ptr); \
pI915XvMC->batch.ptr = batch_ptr; \
assert(pI915XvMC->batch.space >= 0); \
xvmc_driver->batch.space -= (batch_ptr - xvmc_driver->batch.ptr); \
xvmc_driver->batch.ptr = batch_ptr; \
assert(xvmc_driver->batch.space >= 0); \
} while(0)
extern void intelFlushBatch(i915XvMCContext *, Bool);
extern void intelBatchbufferData(i915XvMCContext *, const void *, unsigned, unsigned);
extern void intelInitBatchBuffer(i915XvMCContext *);
extern void intelDestroyBatchBuffer(i915XvMCContext *);
extern void intelCmdIoctl(i915XvMCContext *, char *, unsigned);
extern void intelFlushBatch(Bool);
extern void intelBatchbufferData(const void *, unsigned, unsigned);
extern void intelInitBatchBuffer(void);
extern void intelDestroyBatchBuffer(void);
extern void intelCmdIoctl(char *, unsigned);
#endif /* _INTEL_BATCHBUFFER_H */
......@@ -141,6 +141,9 @@ Status XvMCCreateContext(Display *display, XvPortID port,
return BadValue;
}
xvmc_driver->sarea_size = comm->sarea_size;
xvmc_driver->batchbuffer.handle = comm->batchbuffer.handle;
xvmc_driver->batchbuffer.offset = comm->batchbuffer.offset;
xvmc_driver->batchbuffer.size = comm->batchbuffer.size;
ret = uniDRIQueryDirectRenderingCapable(display, screen,
&isCapable);
......@@ -204,8 +207,7 @@ Status XvMCCreateContext(Display *display, XvPortID port,
return ret;
}
/* FIXME batch buffer */
//intelInitBatchBuffer(xvmc_driver);
intelInitBatchBuffer();
return Success;
}
......@@ -675,7 +677,7 @@ Status XvMCRenderSurface(Display *display, XvMCContext *context,
} /* Field Picture */
}
intelFlushBatch(pI915XvMC, TRUE);
intelFlushBatch(TRUE);
pI915XvMC->last_render = pI915XvMC->alloc.irq_emitted;
privTarget->last_render = pI915XvMC->last_render;
......
......@@ -54,6 +54,8 @@
#include "xf86dri.h"
#include "driDrawable.h"