Skip to content
  • Daniel Vetter's avatar
    i915 XvMC: drop superflous MI_FLUSH · 9bba123c
    Daniel Vetter authored and Carl Worth's avatar Carl Worth committed
    
    
    Cache coherency is now fully under the control of gem.
    
    For lack of hw documentation, I had to find out the correct cache
    placements by trial and error:
    
    Backward and forward surfaces: I915_GEM_DOMAIN_RENDER
    Correlation data:              I915_GEM_DOMAIN_SAMPLER
    
    Changing any of them leads to visual corruptions, so I think these
    are the correct ones.
    
    Reviewed-by: default avatarCarl Worth <cworth@cworth.org>
    9bba123c