Commit 6bab8fab authored by Michel Dänzer's avatar Michel Dänzer Committed by Michel Dänzer

Remove info->dri2.drm_fd and info->drmmode->fd

Use pAMDGPUEnt->fd everywhere instead.
Reviewed-by: Jammy Zhou's avatarJammy Zhou <Jammy.Zhou@amd.com>
parent 0530e39c
......@@ -133,19 +133,18 @@ Bool amdgpu_bo_get_handle(struct amdgpu_buffer *bo, uint32_t *handle)
int amdgpu_bo_map(ScrnInfoPtr pScrn, struct amdgpu_buffer *bo)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
int ret = 0;
if (bo->flags & AMDGPU_BO_FLAGS_GBM) {
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
uint32_t handle, stride, height;
union drm_amdgpu_gem_mmap args;
int fd;
int fd = pAMDGPUEnt->fd;
void *ptr;
handle = gbm_bo_get_handle(bo->bo.gbm).u32;
stride = gbm_bo_get_stride(bo->bo.gbm);
height = gbm_bo_get_height(bo->bo.gbm);
fd = info->dri2.drm_fd;
memset(&args, 0, sizeof(union drm_amdgpu_gem_mmap));
args.in.handle = handle;
......
......@@ -224,9 +224,11 @@ amdgpu_dri2_create_buffer2(ScreenPtr pScreen,
}
if (bo->flags & AMDGPU_BO_FLAGS_GBM) {
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
bo_handle = gbm_bo_get_handle(bo->bo.gbm);
flink.handle = bo_handle.u32;
if (ioctl(info->dri2.drm_fd, DRM_IOCTL_GEM_FLINK, &flink) < 0)
if (ioctl(pAMDGPUEnt->fd, DRM_IOCTL_GEM_FLINK, &flink) < 0)
goto error;
buffers->name = flink.name;
} else {
......@@ -458,13 +460,13 @@ static Bool amdgpu_dri2_get_crtc_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc)
/* CRTC is not running, extrapolate MSC and timestamp */
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
ScrnInfoPtr scrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
CARD64 now, delta_t, delta_seq;
if (!drmmode_crtc->dpms_last_ust)
return FALSE;
if (drmmode_get_current_ust(info->dri2.drm_fd, &now) != 0) {
if (drmmode_get_current_ust(pAMDGPUEnt->fd, &now) != 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
return FALSE;
......@@ -625,7 +627,7 @@ static Bool update_front(DrawablePtr draw, DRI2BufferPtr front)
{
ScreenPtr screen = draw->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
PixmapPtr pixmap;
struct dri2_buffer_priv *priv = front->driverPrivate;
struct amdgpu_buffer *bo = NULL;
......@@ -639,7 +641,7 @@ static Bool update_front(DrawablePtr draw, DRI2BufferPtr front)
if (bo->flags & AMDGPU_BO_FLAGS_GBM) {
bo_handle = gbm_bo_get_handle(bo->bo.gbm);
flink.handle = bo_handle.u32;
if (ioctl(info->dri2.drm_fd, DRM_IOCTL_GEM_FLINK, &flink) < 0)
if (ioctl(pAMDGPUEnt->fd, DRM_IOCTL_GEM_FLINK, &flink) < 0)
return FALSE;
front->name = flink.name;
} else {
......@@ -866,7 +868,7 @@ CARD32 amdgpu_dri2_extrapolate_msc_delay(xf86CrtcPtr crtc, CARD64 * target_msc,
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
ScrnInfoPtr pScrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
int nominal_frame_rate = drmmode_crtc->dpms_last_fps;
CARD64 last_vblank_ust = drmmode_crtc->dpms_last_ust;
uint32_t last_vblank_seq = drmmode_crtc->dpms_last_seq;
......@@ -879,7 +881,7 @@ CARD32 amdgpu_dri2_extrapolate_msc_delay(xf86CrtcPtr crtc, CARD64 * target_msc,
*target_msc = 0;
return FALLBACK_SWAP_DELAY;
}
ret = drmmode_get_current_ust(info->dri2.drm_fd, &now);
ret = drmmode_get_current_ust(pAMDGPUEnt->fd, &now);
if (ret) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
......@@ -957,7 +959,7 @@ CARD32 amdgpu_dri2_deferred_event(OsTimerPtr timer, CARD32 now, pointer data)
DRI2FrameEventPtr event_info = (DRI2FrameEventPtr) data;
xf86CrtcPtr crtc = event_info->crtc;
ScrnInfoPtr scrn;
AMDGPUInfoPtr info;
AMDGPUEntPtr pAMDGPUEnt;
CARD64 drm_now;
int ret;
CARD64 delta_t, delta_seq, frame;
......@@ -980,13 +982,13 @@ CARD32 amdgpu_dri2_deferred_event(OsTimerPtr timer, CARD32 now, pointer data)
}
scrn = crtc->scrn;
info = AMDGPUPTR(scrn);
ret = drmmode_get_current_ust(info->dri2.drm_fd, &drm_now);
pAMDGPUEnt = AMDGPUEntPriv(scrn);
ret = drmmode_get_current_ust(pAMDGPUEnt->fd, &drm_now);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
if (event_info->drm_queue)
amdgpu_drm_queue_handler(info->dri2.drm_fd, 0, 0, 0,
amdgpu_drm_queue_handler(pAMDGPUEnt->fd, 0, 0, 0,
event_info->drm_queue);
else
amdgpu_dri2_frame_event_handler(scrn, 0, 0, data);
......@@ -1002,7 +1004,7 @@ CARD32 amdgpu_dri2_deferred_event(OsTimerPtr timer, CARD32 now, pointer data)
delta_seq /= 1000000;
frame = (CARD64) drmmode_crtc->dpms_last_seq + delta_seq;
if (event_info->drm_queue)
amdgpu_drm_queue_handler(info->dri2.drm_fd, frame, drm_now / 1000000,
amdgpu_drm_queue_handler(pAMDGPUEnt->fd, frame, drm_now / 1000000,
drm_now % 1000000, event_info->drm_queue);
else
amdgpu_dri2_frame_event_handler(scrn, frame, drm_now, data);
......@@ -1032,7 +1034,7 @@ static int amdgpu_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw,
{
ScreenPtr screen = draw->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
DRI2FrameEventPtr wait_info = NULL;
struct amdgpu_drm_queue_entry *wait = NULL;
xf86CrtcPtr crtc = amdgpu_dri2_drawable_crtc(draw, TRUE);
......@@ -1080,7 +1082,7 @@ static int amdgpu_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw,
vbl.request.type = DRM_VBLANK_RELATIVE;
vbl.request.type |= amdgpu_populate_vbl_request_type(crtc);
vbl.request.sequence = 0;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"get vblank counter failed: %s\n", strerror(errno));
......@@ -1118,7 +1120,7 @@ static int amdgpu_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw,
vbl.request.type |= amdgpu_populate_vbl_request_type(crtc);
vbl.request.sequence = target_msc - msc_delta;
vbl.request.signal = (unsigned long)wait;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"get vblank counter failed: %s\n",
......@@ -1150,7 +1152,7 @@ static int amdgpu_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw,
vbl.request.sequence += divisor;
vbl.request.signal = (unsigned long)wait;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"get vblank counter failed: %s\n", strerror(errno));
......@@ -1195,7 +1197,7 @@ static int amdgpu_dri2_schedule_swap(ClientPtr client, DrawablePtr draw,
{
ScreenPtr screen = draw->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
xf86CrtcPtr crtc = amdgpu_dri2_drawable_crtc(draw, TRUE);
uint32_t msc_delta;
drmVBlank vbl;
......@@ -1268,7 +1270,7 @@ static int amdgpu_dri2_schedule_swap(ClientPtr client, DrawablePtr draw,
vbl.request.type = DRM_VBLANK_RELATIVE;
vbl.request.type |= amdgpu_populate_vbl_request_type(crtc);
vbl.request.sequence = 0;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"first get vblank counter failed: %s\n",
......@@ -1316,7 +1318,7 @@ static int amdgpu_dri2_schedule_swap(ClientPtr client, DrawablePtr draw,
vbl.request.sequence = *target_msc - msc_delta;
vbl.request.signal = (unsigned long)swap;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"divisor 0 get vblank counter failed: %s\n",
......@@ -1362,7 +1364,7 @@ static int amdgpu_dri2_schedule_swap(ClientPtr client, DrawablePtr draw,
vbl.request.sequence -= flip;
vbl.request.signal = (unsigned long)swap;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"final get vblank counter failed: %s\n",
......@@ -1404,6 +1406,7 @@ Bool amdgpu_dri2_screen_init(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
DRI2InfoRec dri2_info = { 0 };
const char *driverNames[2];
Bool scheduling_works = TRUE;
......@@ -1411,10 +1414,10 @@ Bool amdgpu_dri2_screen_init(ScreenPtr pScreen)
if (!info->dri2.available)
return FALSE;
info->dri2.device_name = drmGetDeviceNameFromFd(info->dri2.drm_fd);
info->dri2.device_name = drmGetDeviceNameFromFd(pAMDGPUEnt->fd);
dri2_info.driverName = SI_DRIVER_NAME;
dri2_info.fd = info->dri2.drm_fd;
dri2_info.fd = pAMDGPUEnt->fd;
dri2_info.deviceName = info->dri2.device_name;
dri2_info.version = DRI2INFOREC_VERSION;
dri2_info.CreateBuffer = amdgpu_dri2_create_buffer;
......@@ -1426,7 +1429,7 @@ Bool amdgpu_dri2_screen_init(ScreenPtr pScreen)
uint64_t cap_value;
if (drmGetCap
(info->dri2.drm_fd, DRM_CAP_VBLANK_HIGH_CRTC, &cap_value)) {
(pAMDGPUEnt->fd, DRM_CAP_VBLANK_HIGH_CRTC, &cap_value)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"You need a newer kernel "
"for VBLANKs on CRTC > 1\n");
......
......@@ -31,7 +31,6 @@
struct amdgpu_dri2 {
drmVersionPtr pKernelDRMVersion;
int drm_fd;
Bool available;
Bool enabled;
char *device_name;
......
......@@ -44,6 +44,7 @@ static int
amdgpu_dri3_open(ScreenPtr screen, RRProviderPtr provider, int *out)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
drm_magic_t magic;
int fd;
......@@ -77,7 +78,7 @@ amdgpu_dri3_open(ScreenPtr screen, RRProviderPtr provider, int *out)
}
}
if (drmAuthMagic(info->dri2.drm_fd, magic) < 0) {
if (drmAuthMagic(pAMDGPUEnt->fd, magic) < 0) {
close(fd);
return BadMatch;
}
......
......@@ -109,7 +109,9 @@ Bool amdgpu_glamor_pre_init(ScrnInfoPtr scrn)
"Incompatible glamor version, required >= 0.3.0.\n");
return FALSE;
} else {
if (glamor_egl_init(scrn, info->dri2.drm_fd)) {
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
if (glamor_egl_init(scrn, pAMDGPUEnt->fd)) {
xf86DrvMsg(scrn->scrnIndex, X_INFO,
"glamor detected, initialising EGL layer.\n");
} else {
......
......@@ -107,17 +107,17 @@ static Bool AMDGPUGetRec(ScrnInfoPtr pScrn)
/* Free our private AMDGPUInfoRec */
static void AMDGPUFreeRec(ScrnInfoPtr pScrn)
{
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
AMDGPUInfoPtr info;
if (!pScrn || !pScrn->driverPrivate)
if (!pScrn)
return;
info = AMDGPUPTR(pScrn);
if (info->fbcon_pixmap)
if (info && info->fbcon_pixmap)
pScrn->pScreen->DestroyPixmap(info->fbcon_pixmap);
if (info->dri2.drm_fd > 0) {
if (pAMDGPUEnt->fd > 0) {
DevUnion *pPriv;
AMDGPUEntPtr pAMDGPUEnt;
pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
......@@ -164,7 +164,7 @@ static Bool AMDGPUCreateScreenResources_KMS(ScreenPtr pScreen)
return FALSE;
pScreen->CreateScreenResources = AMDGPUCreateScreenResources_KMS;
if (!drmmode_set_desired_modes(pScrn, &info->drmmode, FALSE))
if (!drmmode_set_desired_modes(pScrn, &info->drmmode, pScrn->is_gpu))
return FALSE;
drmmode_uevent_init(pScrn, &info->drmmode);
......@@ -306,6 +306,7 @@ amdgpu_scanout_update(xf86CrtcPtr xf86_crtc)
drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;
struct amdgpu_drm_queue_entry *drm_queue_entry;
ScrnInfoPtr scrn;
AMDGPUEntPtr pAMDGPUEnt;
drmVBlank vbl;
DamagePtr pDamage;
RegionPtr pRegion;
......@@ -343,11 +344,12 @@ amdgpu_scanout_update(xf86CrtcPtr xf86_crtc)
return;
}
pAMDGPUEnt = AMDGPUEntPriv(scrn);
vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
vbl.request.type |= amdgpu_populate_vbl_request_type(xf86_crtc);
vbl.request.sequence = 1;
vbl.request.signal = (unsigned long)drm_queue_entry;
if (drmWaitVBlank(AMDGPUPTR(scrn)->dri2.drm_fd, &vbl)) {
if (drmWaitVBlank(pAMDGPUEnt->fd, &vbl)) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"drmWaitVBlank failed for scanout update: %s\n",
strerror(errno));
......@@ -378,6 +380,7 @@ amdgpu_scanout_flip(ScreenPtr pScreen, AMDGPUInfoPtr info,
{
drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;
ScrnInfoPtr scrn;
AMDGPUEntPtr pAMDGPUEnt;
struct amdgpu_drm_queue_entry *drm_queue_entry;
unsigned scanout_id;
......@@ -400,7 +403,8 @@ amdgpu_scanout_flip(ScreenPtr pScreen, AMDGPUInfoPtr info,
return;
}
if (drmModePageFlip(drmmode_crtc->drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
pAMDGPUEnt = AMDGPUEntPriv(scrn);
if (drmModePageFlip(pAMDGPUEnt->fd, drmmode_crtc->mode_crtc->crtc_id,
drmmode_crtc->scanout[scanout_id].fb_id,
DRM_MODE_PAGE_FLIP_EVENT, drm_queue_entry)) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING, "flip queue failed in %s: %s\n",
......@@ -549,6 +553,7 @@ static Bool AMDGPUPreInitAccel_KMS(ScrnInfoPtr pScrn)
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, false)) {
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
Bool use_glamor = TRUE;
#ifdef HAVE_GBM_BO_USE_LINEAR
const char *accel_method;
......@@ -563,7 +568,7 @@ static Bool AMDGPUPreInitAccel_KMS(ScrnInfoPtr pScrn)
#endif
if (info->dri2.available)
info->gbm = gbm_create_device(info->dri2.drm_fd);
info->gbm = gbm_create_device(pAMDGPUEnt->fd);
if (info->gbm == NULL)
info->dri2.available = FALSE;
......@@ -621,10 +626,8 @@ static Bool AMDGPUPreInitChipType_KMS(ScrnInfoPtr pScrn)
static void amdgpu_reference_drm_fd(ScrnInfoPtr pScrn)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
info->drmmode.fd = info->dri2.drm_fd = pAMDGPUEnt->fd;
pAMDGPUEnt->fd_ref++;
}
......@@ -655,12 +658,12 @@ static Bool amdgpu_get_tile_config(ScrnInfoPtr pScrn)
static void AMDGPUSetupCapabilities(ScrnInfoPtr pScrn)
{
#ifdef AMDGPU_PIXMAP_SHARING
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
uint64_t value;
int ret;
pScrn->capabilities = 0;
ret = drmGetCap(info->dri2.drm_fd, DRM_CAP_PRIME, &value);
ret = drmGetCap(pAMDGPUEnt->fd, DRM_CAP_PRIME, &value);
if (ret == 0) {
if (value & DRM_PRIME_CAP_EXPORT)
pScrn->capabilities |=
......@@ -768,7 +771,7 @@ Bool AMDGPUPreInit_KMS(ScrnInfoPtr pScrn, int flags)
info->dri2.available = FALSE;
info->dri2.enabled = FALSE;
info->dri2.pKernelDRMVersion = drmGetVersion(info->dri2.drm_fd);
info->dri2.pKernelDRMVersion = drmGetVersion(pAMDGPUEnt->fd);
if (info->dri2.pKernelDRMVersion == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"AMDGPUDRIGetVersion failed to get the DRM version\n");
......@@ -943,7 +946,6 @@ void AMDGPUUnblank(ScrnInfoPtr pScrn)
static Bool amdgpu_set_drm_master(ScrnInfoPtr pScrn)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
int err;
......@@ -953,7 +955,7 @@ static Bool amdgpu_set_drm_master(ScrnInfoPtr pScrn)
return TRUE;
#endif
err = drmSetMaster(info->dri2.drm_fd);
err = drmSetMaster(pAMDGPUEnt->fd);
if (err)
ErrorF("Unable to retrieve master\n");
......@@ -962,7 +964,6 @@ static Bool amdgpu_set_drm_master(ScrnInfoPtr pScrn)
static void amdgpu_drop_drm_master(ScrnInfoPtr pScrn)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
#ifdef XF86_PDEV_SERVER_FD
......@@ -971,7 +972,7 @@ static void amdgpu_drop_drm_master(ScrnInfoPtr pScrn)
return;
#endif
drmDropMaster(info->dri2.drm_fd);
drmDropMaster(pAMDGPUEnt->fd);
}
......
......@@ -104,10 +104,11 @@ static Bool
amdgpu_present_flush_drm_events(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
drmmode_crtc_private_ptr drmmode_crtc = xf86_config->crtc[0]->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
struct pollfd p = { .fd = drmmode->fd, .events = POLLIN };
struct pollfd p = { .fd = pAMDGPUEnt->fd, .events = POLLIN };
int r;
do {
......@@ -117,7 +118,7 @@ amdgpu_present_flush_drm_events(ScreenPtr screen)
if (r <= 0)
return 0;
return drmHandleEvent(drmmode->fd, &drmmode->event_context) >= 0;
return drmHandleEvent(pAMDGPUEnt->fd, &drmmode->event_context) >= 0;
}
/*
......@@ -154,7 +155,7 @@ amdgpu_present_queue_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc)
xf86CrtcPtr xf86_crtc = crtc->devPrivate;
ScreenPtr screen = crtc->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
int crtc_id = drmmode_get_crtc_id(xf86_crtc);
struct amdgpu_present_vblank_event *event;
struct amdgpu_drm_queue_entry *queue;
......@@ -178,7 +179,7 @@ amdgpu_present_queue_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc)
vbl.request.sequence = msc;
vbl.request.signal = (unsigned long)queue;
for (;;) {
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (!ret)
break;
if (errno != EBUSY || !amdgpu_present_flush_drm_events(screen)) {
......@@ -397,11 +398,11 @@ amdgpu_present_has_async_flip(ScreenPtr screen)
{
#ifdef DRM_CAP_ASYNC_PAGE_FLIP
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
int ret;
uint64_t value;
ret = drmGetCap(info->dri2.drm_fd, DRM_CAP_ASYNC_PAGE_FLIP, &value);
ret = drmGetCap(pAMDGPUEnt->fd, DRM_CAP_ASYNC_PAGE_FLIP, &value);
if (ret == 0)
return value == 1;
#endif
......
......@@ -214,7 +214,7 @@ int drmmode_get_current_ust(int drm_fd, CARD64 * ust)
int drmmode_crtc_get_ust_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc)
{
ScrnInfoPtr scrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
drmVBlank vbl;
int ret;
......@@ -222,7 +222,7 @@ int drmmode_crtc_get_ust_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc)
vbl.request.type |= amdgpu_populate_vbl_request_type(crtc);
vbl.request.sequence = 0;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"get vblank counter failed: %s\n", strerror(errno));
......@@ -240,7 +240,7 @@ drmmode_do_crtc_dpms(xf86CrtcPtr crtc, int mode)
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
ScrnInfoPtr scrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
CARD64 ust;
int ret;
......@@ -254,7 +254,7 @@ drmmode_do_crtc_dpms(xf86CrtcPtr crtc, int mode)
vbl.request.type = DRM_VBLANK_RELATIVE;
vbl.request.type |= amdgpu_populate_vbl_request_type(crtc);
vbl.request.sequence = 0;
ret = drmWaitVBlank(info->dri2.drm_fd, &vbl);
ret = drmWaitVBlank(pAMDGPUEnt->fd, &vbl);
if (ret)
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get last vblank counter\n",
......@@ -281,7 +281,7 @@ drmmode_do_crtc_dpms(xf86CrtcPtr crtc, int mode)
* Off->On transition: calculate and accumulate the
* number of interpolated vblanks while we were in Off state
*/
ret = drmmode_get_current_ust(info->dri2.drm_fd, &ust);
ret = drmmode_get_current_ust(pAMDGPUEnt->fd, &ust);
if (ret)
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
......@@ -301,11 +301,11 @@ static void
drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode)
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(crtc->scrn);
/* Disable unused CRTCs and enable/disable active CRTCs */
if (!crtc->enabled || mode != DPMSModeOn)
drmModeSetCrtc(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
drmModeSetCrtc(pAMDGPUEnt->fd, drmmode_crtc->mode_crtc->crtc_id,
0, 0, 0, NULL, 0, NULL);
else if (drmmode_crtc->dpms_mode != DPMSModeOn)
crtc->funcs->set_mode_major(crtc, &crtc->mode, crtc->rotation,
......@@ -329,7 +329,7 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
if (pixmap)
return pixmap;
fbcon = drmModeGetFB(drmmode->fd, fbcon_id);
fbcon = drmModeGetFB(pAMDGPUEnt->fd, fbcon_id);
if (fbcon == NULL)
return NULL;
......@@ -339,7 +339,7 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
goto out_free_fb;
flink.handle = fbcon->handle;
if (ioctl(drmmode->fd, DRM_IOCTL_GEM_FLINK, &flink) < 0) {
if (ioctl(pAMDGPUEnt->fd, DRM_IOCTL_GEM_FLINK, &flink) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Couldn't flink fbcon handle\n");
goto out_free_fb;
......@@ -440,7 +440,9 @@ drmmode_crtc_scanout_destroy(drmmode_ptr drmmode,
}
if (scanout->bo) {
drmModeRmFB(drmmode->fd, scanout->fb_id);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(drmmode->scrn);
drmModeRmFB(pAMDGPUEnt->fd, scanout->fb_id);
scanout->fb_id = 0;
amdgpu_bo_unref(&scanout->bo);
scanout->bo = NULL;
......@@ -475,6 +477,7 @@ drmmode_crtc_scanout_allocate(xf86CrtcPtr crtc,
int width, int height)
{
ScrnInfoPtr pScrn = crtc->scrn;
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
int ret;
......@@ -498,7 +501,7 @@ drmmode_crtc_scanout_allocate(xf86CrtcPtr crtc,
}
bo_handle = gbm_bo_get_handle(scanout->bo->bo.gbm);
ret = drmModeAddFB(drmmode->fd, width, height, pScrn->depth,
ret = drmModeAddFB(pAMDGPUEnt->fd, width, height, pScrn->depth,
pScrn->bitsPerPixel, pitch,
bo_handle.u32, &scanout->fb_id);
if (ret) {
......@@ -565,6 +568,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
{
ScrnInfoPtr pScrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn);
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
......@@ -585,7 +589,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
return FALSE;
}
ret = drmModeAddFB(drmmode->fd,
ret = drmModeAddFB(pAMDGPUEnt->fd,
pScrn->virtualX,
pScrn->virtualY,
pScrn->depth, pScrn->bitsPerPixel,
......@@ -696,7 +700,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
}
}
ret =
drmModeSetCrtc(drmmode->fd,
drmModeSetCrtc(pAMDGPUEnt->fd,
drmmode_crtc->mode_crtc->crtc_id, fb_id, x,
y, output_ids, output_count, &kmode);
if (ret)
......@@ -749,9 +753,9 @@ static void drmmode_set_cursor_colors(xf86CrtcPtr crtc, int bg, int fg)
static void drmmode_set_cursor_position(xf86CrtcPtr crtc, int x, int y)
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(crtc->scrn);
drmModeMoveCursor(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id, x, y);
drmModeMoveCursor(pAMDGPUEnt->fd, drmmode_crtc->mode_crtc->crtc_id, x, y);
}
static void drmmode_load_cursor_argb(xf86CrtcPtr crtc, CARD32 * image)
......@@ -782,10 +786,10 @@ static void drmmode_hide_cursor(xf86CrtcPtr crtc)
{
ScrnInfoPtr pScrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
drmModeSetCursor(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id, 0,
drmModeSetCursor(pAMDGPUEnt->fd, drmmode_crtc->mode_crtc->crtc_id, 0,
info->cursor_w, info->cursor_h);
}
......@@ -794,8 +798,8 @@ static void drmmode_show_cursor(xf86CrtcPtr crtc)
{
ScrnInfoPtr pScrn = crtc->scrn;
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
uint32_t bo_handle;
if (!amdgpu_bo_get_handle(drmmode_crtc->cursor_buffer, &bo_handle)) {
......@@ -803,7 +807,7 @@ static void drmmode_show_cursor(xf86CrtcPtr crtc)
return;