Commits · main · Tom St Denis / umr

05 Aug, 2022 1 commit
- reg refresh for GC 10.3.0 · e4643125
  Tom Denis authored Aug 05, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  e4643125
04 Aug, 2022 1 commit
- reg refresh to import MP 13.0.4 · 7305053d
  Tom Denis authored Aug 04, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  7305053d
29 Jul, 2022 1 commit
- reg refresh for gfx11 · 8a6acfd9
  Tom Denis authored Jul 29, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  8a6acfd9
28 Jul, 2022 1 commit

Open various debugfs files as O_RDONLY · 31de08f0

Tom Denis authored Jul 28, 2022



Various files (rings/sensors/etc) don't have write methods
so they should be opened as read only.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>

31de08f0

18 Jul, 2022 5 commits

Update sdma packet fields to version 6 · 7d66e894
Colin Lee authored Jul 15, 2022 and Tom Denis committed Jul 18, 2022
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Signed-off-by: Colin Lee <Colin.Lee@amd.com>
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7d66e894
Update sdma packet sizes to version 6 · c9415e5f
Colin Lee authored Jul 15, 2022 and Tom Denis committed Jul 18, 2022
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Signed-off-by: Colin Lee <Colin.Lee@amd.com>
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c9415e5f
Update SDMA decoding docs · 68b54b51
Colin Lee authored Jul 15, 2022 and Tom Denis committed Jul 18, 2022
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Signed-off-by: Colin Lee <Colin.Lee@amd.com>
```
68b54b51

Add ui for returning size of unhandled SDMA packets · b3168394

Colin Lee authored Jul 15, 2022 and

Tom Denis committed Jul 18, 2022



The main thing is that the ui originally used for
umr_sdma_decode_stream_opcodes is now also used for
umr_sdma_decode_stream to include an interface for returning the size of
a packet with a given op code. This is needed because SDMA packets do
not the size of the packet in the packet header, so the size of the
packet is only knowable by the opcode. The new callback allows
externally returning the size of the packet.
Signed-off-by: Colin Lee <Colin.Lee@amd.com>

b3168394

Loosen requirements for grabbing ip ver from .reg · e0367447

Colin Lee authored Jul 15, 2022 and

Tom Denis committed Jul 18, 2022



Support having any suffix behind the IP version number in filename
including extra numbers (e.g. sdma0_4_0_0.reg) and underscores (e.g.
my_database/gc_9_0_0.reg).

Also support having only major+minor revision (e.g. gc_9_0.reg).
Signed-off-by: Colin Lee <Colin.Lee@amd.com>

e0367447

15 Jul, 2022 1 commit
- addition of new DCN and DPCS headers · 44342bbd
  Tom Denis authored Jul 15, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  44342bbd
14 Jul, 2022 1 commit
- add new IP block umc 8.7.0 · fda170db
  Tom Denis authored Jul 14, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  fda170db
13 Jul, 2022 1 commit
- Store proper revision data with each IP block · 04b65ce6
  Tom Denis authored Jul 13, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  04b65ce6
12 Jul, 2022 2 commits
- CI: Use freedesktop templates · 22712fa7
  Dmitrii Galantsev authored Jun 27, 2022 and Tom Denis committed Jul 12, 2022
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Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
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  22712fa7
- CI: Use shared freedesktop runner · 973d4891
  Dmitrii Galantsev authored Jun 22, 2022 and Tom Denis committed Jul 12, 2022
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Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
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  973d4891
11 Jul, 2022 3 commits
- server: properly forward mtype and tmz info · baa55d06
  Pierre-Eric Pelloux-Prayer authored Jun 21, 2022 and Tom Denis committed Jul 11, 2022
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Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  baa55d06
- Fix mtype decode on FAMILY_NV · d40ed5df
  Pierre-Eric Pelloux-Prayer authored Jun 21, 2022 and Tom Denis committed Jul 11, 2022
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The mtype field has moved between GFX9 and GFX10.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  d40ed5df
- DCN register refresh · f46afe93
  Tom Denis authored Jul 11, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  f46afe93
27 Jun, 2022 1 commit
- remove some stale contnet from umr_access_vram_ai() · 7eaf28ce
  Tom Denis authored Jun 27, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  7eaf28ce
17 Jun, 2022 6 commits
- server: avoid crashing if the requested register isn't found · 8216f4a8
  Pierre-Eric Pelloux-Prayer authored Jun 17, 2022 and Tom Denis committed Jun 17, 2022
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Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  8216f4a8
- gui: add warning tooltip in the power panel · d3ca4eab
  Pierre-Eric Pelloux-Prayer authored Jun 17, 2022 and Tom Denis committed Jun 17, 2022
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Make sure the user is aware of the risk of setting the fan control
to Manual.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  d3ca4eab
- gui, server: expose the amdgpu_dm_visual_confirm sysfs · 108636c3
  Pierre-Eric Pelloux-Prayer authored Jun 17, 2022 and Tom Denis committed Jun 17, 2022
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Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  108636c3
- only match for instance if ipname is passed to umr_find_reg_data_by_ip() · 1e0b2a62
  Tom Denis authored Jun 17, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  1e0b2a62
- update umr_find_reg_data_by_ip() to parse out IP instances from IP names · b396fa28
  Tom Denis authored Jun 17, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  b396fa28
- dcn 3.2.x reg refresh · 93c1ab68
  Tom Denis authored Jun 17, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  93c1ab68
16 Jun, 2022 4 commits
- gui: rework address display in shader disassembly · 4de6fe5f
  Pierre-Eric Pelloux-Prayer authored Jun 15, 2022 and Tom Denis committed Jun 16, 2022
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This avoids addresses being partially displayed.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  4de6fe5f
- gui: expose the "evict vram/gtt" sysfs file · 26b36403
  Pierre-Eric Pelloux-Prayer authored Jun 15, 2022 and Tom Denis committed Jun 16, 2022
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Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
```
  26b36403
- gui: expose the drm counters in the memory_panel · ec8e292e
  Pierre-Eric Pelloux-Prayer authored Jun 15, 2022 and Tom Denis committed Jun 16, 2022
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They can be useful to identify memory-related perf issues.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
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  ec8e292e
- server: add "drm-counters" command · 8dd29622
  Pierre-Eric Pelloux-Prayer authored Jun 15, 2022 and Tom Denis committed Jun 16, 2022
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This will query and send back the values of the counters
exposed by amdgpu.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-praye@amd.com>
```
  8dd29622
14 Jun, 2022 1 commit
- Add docker and gitlab ci support · 5aaf885a
  Dmitrii Galantsev authored Jun 03, 2022 and Tom Denis committed Jun 14, 2022
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Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
```
  5aaf885a
09 Jun, 2022 1 commit
- if not match for instance skip over instanced IP blocks · 27d5f1ed
  Tom Denis authored Jun 09, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  27d5f1ed
08 Jun, 2022 1 commit
- nbio 4.3.0 reg refresh · ae930c51
  Tom Denis authored Jun 08, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  ae930c51
07 Jun, 2022 1 commit

umr: print MODE register as part of wave state · 070cd1f5

Joseph Greathouse authored Jun 06, 2022 and

Tom Denis committed Jun 07, 2022

The MODE register contains detailed per-wave information, but UMR
skipped printing it. This patch adds the ability to print each wave's
MODE register as part of the wave scan operation, and prints the MODE
register's sub-fields as part of the deeper print option.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>

070cd1f5

06 Jun, 2022 1 commit
- dce 11.0.0 reg refresh · 72b4c52d
  Tom Denis authored Jun 06, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  72b4c52d
03 Jun, 2022 2 commits
- reparse database soc15 files with new compiler · 6ccde45a
  Tom Denis authored Jun 03, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  6ccde45a
- support upto 32 IP instances now · a3531285
  Tom Denis authored Jun 03, 2022
```
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  a3531285
02 Jun, 2022 5 commits
- Validate GPU VA are in span of root page table · c693cb16
  Colin Lee authored Jun 01, 2022 and Tom Denis committed Jun 02, 2022
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When accessing GPU virtual address, validate that the VA is in the span
of the root page table of the given VM context before trying to do
virtual address translation.
Signed-off-by: Colin Lee <Colin.Lee@amd.com>
```
  c693cb16
- Read from FB for vmid0 access to FB memory · fb11a807
  Colin Lee authored Jun 01, 2022 and Tom Denis committed Jun 02, 2022
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Signed-off-by: Colin Lee <Colin.Lee@amd.com>
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  fb11a807
- Add VM test vector #16 which reports VM decoding errors outside of the page table span · bf7740f5
  Tom Denis authored Jun 02, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
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  bf7740f5
- add VM test #15 - test for access inside SAM region · 683b0b10
  Tom Denis authored Jun 02, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  683b0b10
- new dcn and mmhub ip blocks with nbio refresh · 0572c02f
  Tom Denis authored Jun 01, 2022
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Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
```
  0572c02f