From 29d516af153cbccf4eea133f00fa49b6fc6d9d1e Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Date: Thu, 20 Jun 2019 13:54:56 +0200
Subject: [PATCH] WIP: AFBC
---
drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 9 +++++----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index da76a88412c2f..b4f5b0528890e 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -40,7 +40,7 @@ rockchip_verify_afbc_mod(struct drm_device *dev,
if (mode_cmd->modifier[0] &
~DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_ROCKCHIP)) {
DRM_DEV_ERROR(dev->dev,
- "Unsupported format modifier 0%x\n",
+ "Unsupported format modifier 0x%llx\n",
mode_cmd->modifier[0]);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 447dfa8fd966a..0619eaa7d3770 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -622,7 +622,6 @@ static int vop_enable(struct drm_crtc *crtc)
vop_win_disable(vop, win);
}
- spin_unlock(&vop->reg_lock);
if (vop->data->afbc) {
VOP_AFBC_SET(vop, enable, 0);
@@ -631,6 +630,8 @@ static int vop_enable(struct drm_crtc *crtc)
vop_cfg_done(vop);
+ spin_unlock(&vop->reg_lock);
+
/*
* At here, vop clock & iommu is enable, R/W vop regs would be safe.
*/
@@ -798,13 +799,13 @@ static void vop_plane_atomic_disable(struct drm_plane *plane,
if (!old_state->crtc)
return;
+ if (vop->afbc_win == vop_win)
+ vop->afbc_win = NULL;
+
spin_lock(&vop->reg_lock);
vop_win_disable(vop, win);
- if (vop->afbc_win == vop_win)
- vop->afbc_win = NULL;
-
spin_unlock(&vop->reg_lock);
}
--
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