1. 26 Oct, 2018 1 commit
  2. 20 Sep, 2018 1 commit
  3. 10 Sep, 2018 9 commits
  4. 07 Sep, 2018 2 commits
  5. 05 Sep, 2018 1 commit
  6. 04 Sep, 2018 1 commit
    • Eric Anholt's avatar
      gallium: Add a helper for implementing PIPE_CAP_* default values. · ad782a70
      Eric Anholt authored
      One of the pains of implementing a gallium driver is filling in a million
      pipe caps you don't know about yet when you're just starting out.  One of
      the pains of working on gallium is copy-and-pasting your new PIPE_CAP into
      each driver.  We can fix both of these by having each driver call into the
      default helper from their default case, so that both sides can ignore each
      other until they need to.
      
      v2: fix i915g build, revert swr change to avoid breaking scons build
          (https://travis-ci.org/anholt/mesa/jobs/419739857)
      v3: Rebase on 3 new gallium caps.
      
      Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
      Cc: Bruce Cherniak <bruce.cherniak@intel.com>
      Cc: George Kyriazis <george.kyriazis@intel.com>
      Cc: Kenneth Graunke <kenneth@whitecape.org>
      ad782a70
  7. 25 Aug, 2018 1 commit
    • Kenneth Graunke's avatar
      gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE. · 12816088
      Kenneth Graunke authored
      Some hardware can do PIPE_TEX_WRAP_MIRROR_REPEAT but not
      PIPE_TEX_WRAP_MIRROR_CLAMP and PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER.
      
      Drivers for such hardware would like to advertise support for
      ARB_texture_mirror_clamp_to_edge but not EXT_texture_mirror_clamp.
      
      This commit adds a new PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE bit,
      changes the extension enable to be based on that, and enables it
      in all upstream drivers which supported PIPE_CAP_TEXTURE_MIRROR_CLAMP
      (so they continue supporting this mode).
      12816088
  8. 23 Aug, 2018 2 commits
  9. 16 Aug, 2018 2 commits
  10. 31 Jul, 2018 1 commit
  11. 20 Jun, 2018 1 commit
  12. 15 Jun, 2018 1 commit
  13. 30 May, 2018 1 commit
  14. 01 May, 2018 1 commit
  15. 20 Mar, 2018 1 commit
  16. 17 Feb, 2018 1 commit
  17. 13 Feb, 2018 1 commit
  18. 30 Jan, 2018 1 commit
  19. 17 Jan, 2018 4 commits
  20. 19 Dec, 2017 1 commit
  21. 28 Nov, 2017 2 commits
  22. 17 Nov, 2017 1 commit
  23. 09 Nov, 2017 1 commit
    • Dave Airlie's avatar
      gallium: add CAPs to support HW atomic counters. (v3) · 2a06423c
      Dave Airlie authored
      This looks like an evergreen specific feature, but with atomic
      counters AMD have hw specific counters they use instead of operating
      on buffers directly. These are separate to the buffer atomics,
      so require different limits and code paths.
      
      I've left the CAP for atomic type extensible in case someone
      else has a variant on this sort of thing (freedreno maybe?)
      and needs to change it.
      
      This adds all the CAPs required to add support for those atomic
      counters, along with a related CAP for limiting the number of
      output resources.
      
      I'd like to land this and the st patch then I can start to
      upstream the evergreen support for these and other GL4.x features.
      
      v2: drop the ATOMIC_COUNTER_MODE cap, just use the return
      from the HW counters. If 0 we use the current mode.
      v3: fix some rebase errors (Gert Wollny)
      Reviewed-by: default avatarNicolai Hähnle <nicolai.haehnle@amd.com>
      Reviewed-by: default avatarMarek Olšák <marek.olsak@amd.com>
      Tested-By: Gert Wollny's avatarGert Wollny <gw.fossdev@gmail.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      2a06423c
  24. 06 Nov, 2017 1 commit
  25. 01 Nov, 2017 1 commit