Commit e93d918b authored by Chia-I Wu's avatar Chia-I Wu

virgl: add VIRGL_DEBUG_SYNC

When set, wait after every each flush.
Signed-off-by: Chia-I Wu's avatarChia-I Wu <olvaffe@gmail.com>
Reviewed-By: Gert Wollny's avatarGert Wollny <gert.wollny@collabora.com>
Reviewed-By: Alexandros Frantzis's avatarAlexandros Frantzis <alexandros.frantzis@collabora.com>
parent 119b5701
......@@ -869,6 +869,22 @@ static void virgl_draw_vbo(struct pipe_context *ctx,
}
static void virgl_submit_cmd(struct virgl_winsys *vws,
struct virgl_cmd_buf *cbuf,
struct pipe_fence_handle **fence)
{
if (unlikely(virgl_debug & VIRGL_DEBUG_SYNC)) {
struct pipe_fence_handle *sync_fence = NULL;
vws->submit_cmd(vws, cbuf, &sync_fence);
vws->fence_wait(vws, sync_fence, PIPE_TIMEOUT_INFINITE);
vws->fence_reference(vws, &sync_fence, NULL);
} else {
vws->submit_cmd(vws, cbuf, fence);
}
}
static void virgl_flush_eq(struct virgl_context *ctx, void *closure,
struct pipe_fence_handle **fence)
{
......@@ -887,7 +903,8 @@ static void virgl_flush_eq(struct virgl_context *ctx, void *closure,
ctx->num_draws = ctx->num_compute = 0;
virgl_transfer_queue_clear(&ctx->queue, ctx->cbuf);
rs->vws->submit_cmd(rs->vws, ctx->cbuf, fence);
virgl_submit_cmd(rs->vws, ctx->cbuf, fence);
/* Reserve some space for transfers. */
if (ctx->encoded_transfers)
......
......@@ -45,6 +45,7 @@ static const struct debug_named_value debug_options[] = {
{ "tgsi", VIRGL_DEBUG_TGSI, NULL },
{ "emubgra", VIRGL_DEBUG_EMULATE_BGRA, "Enable tweak to emulate BGRA as RGBA on GLES hosts"},
{ "bgraswz", VIRGL_DEBUG_BGRA_DEST_SWIZZLE, "Enable tweak to swizzle emulated BGRA on GLES hosts" },
{ "sync", VIRGL_DEBUG_SYNC, "Sync after every flush" },
DEBUG_NAMED_VALUE_END
};
DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
......
......@@ -32,6 +32,7 @@ enum virgl_debug_flags {
VIRGL_DEBUG_TGSI = 1 << 1,
VIRGL_DEBUG_EMULATE_BGRA = 1 << 2,
VIRGL_DEBUG_BGRA_DEST_SWIZZLE = 1 << 3,
VIRGL_DEBUG_SYNC = 1 << 4,
};
extern int virgl_debug;
......
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