Commit 5411f470 authored by Samuel Pitoiset's avatar Samuel Pitoiset

radv: set DISABLE_CONSTANT_ENCODE_REG to 1 for Raven2

Ported from RadeonSI, will be emitted for GFX10 too.
Signed-off-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen's avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
parent 34bef8a0
......@@ -1876,6 +1876,8 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
S_028208_BR_Y(framebuffer->height));
if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX8) {
bool disable_constant_encode =
cmd_buffer->device->physical_device->has_dcc_constant_encode;
uint8_t watermark = 4; /* Default value for GFX8. */
/* For optimal DCC performance. */
......@@ -1889,7 +1891,8 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
radeon_set_context_reg(cmd_buffer->cs, R_028424_CB_DCC_CONTROL,
S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) |
S_028424_OVERWRITE_COMBINER_WATERMARK(watermark));
S_028424_OVERWRITE_COMBINER_WATERMARK(watermark) |
S_028424_DISABLE_CONSTANT_ENCODE_REG(disable_constant_encode));
}
if (cmd_buffer->device->dfsm_allowed) {
......
......@@ -371,6 +371,8 @@ radv_physical_device_init(struct radv_physical_device *device,
(device->rad_info.chip_class >= GFX8 &&
device->rad_info.me_fw_feature >= 41);
device->has_dcc_constant_encode = device->rad_info.family == CHIP_RAVEN2;
device->use_shader_ballot = device->instance->perftest_flags & RADV_PERFTEST_SHADER_BALLOT;
radv_physical_device_init_mem_types(device);
......
......@@ -319,6 +319,9 @@ struct radv_physical_device {
/* Whether to enable the AMD_shader_ballot extension */
bool use_shader_ballot;
/* Whether DISABLE_CONSTANT_ENCODE_REG is supported. */
bool has_dcc_constant_encode;
/* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps.
*/
......
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