- Jan 17, 2019
-
-
Kevin Strasser authored
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
-
Kevin Strasser authored
Add 64 bpp 16:16:16:16 half float pixel formats. Each 16 bit component is formatted in IEEE-754 half-precision float (binary16) 1:5:10 MSb-sign:exponent:fraction form. Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
-
- Jan 03, 2019
-
-
Eric Engestrom authored
Also, move the sentence about "who would use libdrm" into its own paragraph, as it is something people discovering libdrm will want to know. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
-
Eric Engestrom authored
Thanks to the #error just above, any file including this header can only see one state for this macro: defined, with the value `1`. Let's just #undef it once we're done using it in here so that other files don't misconstrue any meaning to it. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
-
Eric Engestrom authored
While at it, let's include xf86atomic.h explicitly, instead of relying on some other file accidentally including it before including this file. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
-
- Dec 18, 2018
-
-
maurossi authored
Seemingly the 64-bit int is always aligned to 8 in LP64. But this is not hold in LP32. Consequently sizeof(gralloc_drm_handle_t) are different between LP64 (which is 18 ints) and LP32 (which is 16 ints). As a result, 32-bit apps will crash in 64-bit OS since the checking handle->base.numInts != GRALLOC_GBM_HANDLE_NUM_INTS is true. Fix it by always aligning 64-bit int to 8. Besides, to avoid additional padding, just exchange the order of data_owner and modifier. It aligns modifier to 8 natually. This makes gralloc_drm_handle_t fit in 16 ints perfectly. (v2) gralloc_drm_handle.h patch now applied in gralloc_handle.h and GRALLOC_HANDLE_VERSION updated to 4 Reported-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw> Reviewed-by: Robert Foss <robert.foss@collabora.com>
-
- Dec 17, 2018
-
-
Lucas De Marchi authored
This is the directory used by meson/autotools (at least in the .gitlab-ci configuration) so ignore the whole dir. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Emil Velikov <emil.velikov@collabora.com>
-
Lucas De Marchi authored
LANG=C sort -u .gitignore | sponge .gitignore This way it's easier to keep track of the entries. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Emil Velikov <emil.velikov@collabora.com>
-
- Dec 14, 2018
-
-
Leo Liu authored
Just make them properly i.e. put 0 to the Nop reg Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-
It is a cleaner and less fragile way to get PCI IDs than the one currently used by local DPorts patches. Signed-off-by: François Tigeot <ftigeot@wolfpond.org>
-
Like on OpenBSD, the DragonFly BSD kernel only contains pci drm drivers. Signed-off-by: François Tigeot <ftigeot@wolfpond.org>
-
- Dec 11, 2018
-
-
Andrey Grodzovsky authored
I retested GPU recovery with Bonaire ASIC and it works. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
-
- Dec 05, 2018
-
-
Christian König authored
Make sure the kernel doesn't crash if we map something at the minimum/maximum address. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
-
- Nov 20, 2018
-
-
Emma Anholt authored
For ARM systems with tinydrm displays attached to SPI, the bus name is /spi but we have platform device info for the rest. Fixes eglInitialize() failures on hx8357d since the EGL_EXT_device_drm changes. Acked-by: Eric Engestrom <eric.engestrom@intel.com>
-
Emma Anholt authored
Having people count characters is error-prone, when we could just have a computer do it. Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
-
- Nov 11, 2018
-
-
Eric Engestrom authored
Error message was invalid too, negative values aren't the number of devices, they're errno error codes. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Daniel Stone <daniels@collabora.com>
-
- Nov 09, 2018
-
-
Eric Engestrom authored
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
-
Eric Engestrom authored
Reported-by: Jan Vesely <jano.vesely@gmail.com> Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
-
- Nov 02, 2018
-
-
Andrey Grodzovsky authored
Since only for those ASICs gpu reset is enabled by deafult. Also update disable message and fix identation . Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-
- Nov 01, 2018
-
-
Andrey Grodzovsky authored
Illegal access will cause CP hang followed by job timeout and recovery kicking in. Also, disable the suite for all APU ASICs until GPU reset issues for them will be resolved and GPU reset recovery will be enabled by default. v2: Add KV to deasbled APUs list and add comments regarding necessary kernel amdgpu paramteres to run the tests. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-
- Oct 17, 2018
-
-
Simona Vetter authored
Looks much neater on the gitlab UI, e.g. on my personal libdrm fork: https://gitlab.freedesktop.org/danvet/drm Acked-by: Eric Engestrom <eric.engestrom@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
-
- Oct 16, 2018
-
-
Rob Clark authored
Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
- Oct 14, 2018
-
-
Rob Clark authored
Wasn't really sure how to switch the silly -Wdeclaration-after-statement flag off on a per directory basis. So make the code uglier instead.
-
Rob Clark authored
Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
- Oct 13, 2018
-
-
Rob Clark authored
Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
Now that it doesn't have to deal with ringmarkers we can simplify the reloc handling. Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
With streaming stateobjs to upload uniforms, the submit.cmds table gets much larger, and iterating over it for each ring to ring reloc starts getting expensive. TODO if we have flag to pass when constructing parent rb, we could avoid dynamically allocating this and bo_table in get_cmd() or bo2idx Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
Now that it doesn't have to deal with the ringmarker case, we can make some simplifications. Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
The msm_cmd isn't refcount'd, so with stateobj rb's that have independent lifecycle, this is no longer a safe thing to do. Really, now that there is a bo-cache for rb's, fd_ringbuffer_reset() should be deprecated because it adds a bunch of pointless complexity. Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
It's usage in mesa was removed more than two years ago. And it stands in the way of some optimizations needed to reduce the overhead of hw stateobjs (ie. CP_SET_DRAW_STATE, where the # of cmds in the submit ioctl goes up significantly). Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
For now, we want a way for gallium to be able to provide hints for the upcoming rb suballocation. But could be useful for other things down the road. Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
Move this out of msm_ringbuffer backend so that the gallium driver can refcnt rb's Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
Since 28328298 'freedreno: move ring_cache behind fd_bo_del()' this hack is no longer necessary. Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
Rob Clark authored
drmMalloc() is already calloc() Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
-
- Oct 10, 2018
-
-
Andrey Grodzovsky authored
Seems like AI and RV requires uncashed memory mapping to be able to pickup value written to memory by CPU after the WAIT_REG_MEM command was already launched. . Enable the test for AI and RV. v2: Update commit description. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-
Andrey Grodzovsky authored
v2: Call amdgpu_bo_va_op_raw directly in amdgpu_bo_alloc_and_map_raw Move amdgpu_bo_alloc_and_map_raw into C file to avoid including unistd.h in amdgpu_test.h Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-
- Oct 09, 2018
-
-
Thomas Hellstrom authored
To determine whether a device node is a drm device node or not, the code currently compares the node's major number to the static drm major device number. This breaks the standalone vmwgfx driver on XWayland dri clients, https://cgit.freedesktop.org/mesa/vmwgfx and any future attempt to introduce dynamic device numbers for drm. So instead of checking for the device major, instead check for the presence of the /sys/dev/char/<major>:<minor>/device/drm directory. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> Acked-by: Dave Airlie <airlied@redhat.com>
-
- Oct 04, 2018
-
-
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
-
Fixes: 4e81d4f9 ("intel: add generic functions to check PCI ID") Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
-