Commit ffb46b2b authored by Rafael Antognolli's avatar Rafael Antognolli
Browse files

iris: Align fast clear color state buffer to a page.



On gen11 and older, compressed images are tiled and aligned to 4K. On
gen12 this 4K alignment restriction was removed. However, only aligning
the fast clear color buffer to 64B (a cacheline, as it's on the
documentation) is causing some bugs where the fast clear color is not
converted during the fast clear operation. Aligning things to 4K seems
to fix it.

v2: Fix typo case in the comment (Nanley)
v3: Rebase and fix conflicts.
v4: Fix rebase mistake (Nanley).
Reviewed-by: Nanley Chery's avatarNanley Chery <nanley.g.chery@intel.com>
parent e51722a7
Pipeline #74729 passed with stages
in 51 minutes and 20 seconds
......@@ -579,7 +579,12 @@ iris_resource_configure_aux(struct iris_screen *screen,
*
* On gen <= 9, we are going to store the clear color on the buffer
* anyways, and copy it back to the surface state during state emission.
*
* Also add some padding to make sure the fast clear color state buffer
* starts at a 4K alignment. We believe that 256B might be enough, but due
* to lack of testing we will leave this as 4K for now.
*/
size = ALIGN(size, 4096);
res->aux.clear_color_offset = res->aux.offset + size;
size += iris_get_aux_clear_color_state_size(screen);
*aux_size_B = size;
......
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