nv50_surface.c 51 KB
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/*
 * Copyright 2008 Ben Skeggs
 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
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 */
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#include <stdint.h>
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#include "pipe/p_defines.h"
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#include "util/u_inlines.h"
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#include "util/u_pack_color.h"
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#include "util/u_format.h"
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#include "util/u_surface.h"
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#include "tgsi/tgsi_ureg.h"

#include "os/os_thread.h"

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#include "nv50/nv50_context.h"
#include "nv50/nv50_resource.h"
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#include "nv50/nv50_defs.xml.h"
#include "nv50/nv50_texture.xml.h"
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/* these are used in nv50_blit.h */
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#define NV50_ENG2D_SUPPORTED_FORMATS 0xff0843e080608409ULL
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#define NV50_ENG2D_NOCONVERT_FORMATS 0x0008402000000000ULL
#define NV50_ENG2D_LUMINANCE_FORMATS 0x0008402000000000ULL
#define NV50_ENG2D_INTENSITY_FORMATS 0x0000000000000000ULL
#define NV50_ENG2D_OPERATION_FORMATS 0x060001c000608000ULL
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#define NOUVEAU_DRIVER 0x50
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#include "nv50/nv50_blit.h"
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static INLINE uint8_t
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nv50_2d_format(enum pipe_format format, boolean dst, boolean dst_src_equal)
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{
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   uint8_t id = nv50_format_table[format].rt;

   /* Hardware values for color formats range from 0xc0 to 0xff,
    * but the 2D engine doesn't support all of them.
    */
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   if ((id >= 0xc0) && (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0))))
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      return id;
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   assert(dst_src_equal);
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   switch (util_format_get_blocksize(format)) {
   case 1:
      return NV50_SURFACE_FORMAT_R8_UNORM;
   case 2:
      return NV50_SURFACE_FORMAT_R16_UNORM;
   case 4:
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      return NV50_SURFACE_FORMAT_BGRA8_UNORM;
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   default:
      return 0;
   }
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}

static int
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nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
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                    struct nv50_miptree *mt, unsigned level, unsigned layer,
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                    enum pipe_format pformat, boolean dst_src_pformat_equal)
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{
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   struct nouveau_bo *bo = mt->base.bo;
   uint32_t width, height, depth;
   uint32_t format;
   uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT;
   uint32_t offset = mt->level[level].offset;

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   format = nv50_2d_format(pformat, dst, dst_src_pformat_equal);
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   if (!format) {
      NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
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                  util_format_name(pformat));
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      return 1;
   }

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   width = u_minify(mt->base.base.width0, level) << mt->ms_x;
   height = u_minify(mt->base.base.height0, level) << mt->ms_y;
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   depth = u_minify(mt->base.base.depth0, level);
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   offset = mt->level[level].offset;
   if (!mt->layout_3d) {
      offset += mt->layer_stride * layer;
      depth = 1;
      layer = 0;
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   } else
   if (!dst) {
      offset += nv50_mt_zslice_offset(mt, level, layer);
      layer = 0;
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   }

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   if (!nouveau_bo_memtype(bo)) {
      BEGIN_NV04(push, SUBC_2D(mthd), 2);
      PUSH_DATA (push, format);
      PUSH_DATA (push, 1);
      BEGIN_NV04(push, SUBC_2D(mthd + 0x14), 5);
      PUSH_DATA (push, mt->level[level].pitch);
      PUSH_DATA (push, width);
      PUSH_DATA (push, height);
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      PUSH_DATAh(push, mt->base.address + offset);
      PUSH_DATA (push, mt->base.address + offset);
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   } else {
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      BEGIN_NV04(push, SUBC_2D(mthd), 5);
      PUSH_DATA (push, format);
      PUSH_DATA (push, 0);
      PUSH_DATA (push, mt->level[level].tile_mode);
      PUSH_DATA (push, depth);
      PUSH_DATA (push, layer);
      BEGIN_NV04(push, SUBC_2D(mthd + 0x18), 4);
      PUSH_DATA (push, width);
      PUSH_DATA (push, height);
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      PUSH_DATAh(push, mt->base.address + offset);
      PUSH_DATA (push, mt->base.address + offset);
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   }

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#if 0
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   if (dst) {
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      BEGIN_NV04(push, SUBC_2D(NV50_2D_CLIP_X), 4);
      PUSH_DATA (push, 0);
      PUSH_DATA (push, 0);
      PUSH_DATA (push, width);
      PUSH_DATA (push, height);
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   }
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#endif
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   return 0;
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}

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static int
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nv50_2d_texture_do_copy(struct nouveau_pushbuf *push,
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                        struct nv50_miptree *dst, unsigned dst_level,
                        unsigned dx, unsigned dy, unsigned dz,
                        struct nv50_miptree *src, unsigned src_level,
                        unsigned sx, unsigned sy, unsigned sz,
                        unsigned w, unsigned h)
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{
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   const enum pipe_format dfmt = dst->base.base.format;
   const enum pipe_format sfmt = src->base.base.format;
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   int ret;
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   boolean eqfmt = dfmt == sfmt;
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   if (!PUSH_SPACE(push, 2 * 16 + 32))
      return PIPE_ERROR;
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   ret = nv50_2d_texture_set(push, 1, dst, dst_level, dz, dfmt, eqfmt);
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   if (ret)
      return ret;

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   ret = nv50_2d_texture_set(push, 0, src, src_level, sz, sfmt, eqfmt);
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   if (ret)
      return ret;

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   BEGIN_NV04(push, NV50_2D(BLIT_CONTROL), 1);
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   PUSH_DATA (push, NV50_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE);
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   BEGIN_NV04(push, NV50_2D(BLIT_DST_X), 4);
   PUSH_DATA (push, dx << dst->ms_x);
   PUSH_DATA (push, dy << dst->ms_y);
   PUSH_DATA (push, w << dst->ms_x);
   PUSH_DATA (push, h << dst->ms_y);
   BEGIN_NV04(push, NV50_2D(BLIT_DU_DX_FRACT), 4);
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   PUSH_DATA (push, 0);
   PUSH_DATA (push, 1);
   PUSH_DATA (push, 0);
   PUSH_DATA (push, 1);
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   BEGIN_NV04(push, NV50_2D(BLIT_SRC_X_FRACT), 4);
   PUSH_DATA (push, 0);
   PUSH_DATA (push, sx << src->ms_x);
   PUSH_DATA (push, 0);
   PUSH_DATA (push, sy << src->ms_y);
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   return 0;
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}

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static void
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nv50_resource_copy_region(struct pipe_context *pipe,
                          struct pipe_resource *dst, unsigned dst_level,
                          unsigned dstx, unsigned dsty, unsigned dstz,
                          struct pipe_resource *src, unsigned src_level,
                          const struct pipe_box *src_box)
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{
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   struct nv50_context *nv50 = nv50_context(pipe);
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   int ret;
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   boolean m2mf;
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   unsigned dst_layer = dstz, src_layer = src_box->z;

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   if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
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      nouveau_copy_buffer(&nv50->base,
                          nv04_resource(dst), dstx,
                          nv04_resource(src), src_box->x, src_box->width);
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      return;
   }

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   /* 0 and 1 are equal, only supporting 0/1, 2, 4 and 8 */
   assert((src->nr_samples | 1) == (dst->nr_samples | 1));
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   m2mf = (src->format == dst->format) ||
      (util_format_get_blocksizebits(src->format) ==
       util_format_get_blocksizebits(dst->format));

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   nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;

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   if (m2mf) {
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      struct nv50_m2mf_rect drect, srect;
      unsigned i;
      unsigned nx = util_format_get_nblocksx(src->format, src_box->width);
      unsigned ny = util_format_get_nblocksy(src->format, src_box->height);

      nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz);
      nv50_m2mf_rect_setup(&srect, src, src_level,
                           src_box->x, src_box->y, src_box->z);

      for (i = 0; i < src_box->depth; ++i) {
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         nv50_m2mf_transfer_rect(nv50, &drect, &srect, nx, ny);
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         if (nv50_miptree(dst)->layout_3d)
            drect.z++;
         else
            drect.base += nv50_miptree(dst)->layer_stride;

         if (nv50_miptree(src)->layout_3d)
            srect.z++;
         else
            srect.base += nv50_miptree(src)->layer_stride;
      }
      return;
   }

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   assert((src->format == dst->format) ||
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          (nv50_2d_src_format_faithful(src->format) &&
           nv50_2d_dst_format_faithful(dst->format)));
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   BCTX_REFN(nv50->bufctx, 2D, nv04_resource(src), RD);
   BCTX_REFN(nv50->bufctx, 2D, nv04_resource(dst), WR);
   nouveau_pushbuf_bufctx(nv50->base.pushbuf, nv50->bufctx);
   nouveau_pushbuf_validate(nv50->base.pushbuf);

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   for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
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      ret = nv50_2d_texture_do_copy(nv50->base.pushbuf,
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                                    nv50_miptree(dst), dst_level,
                                    dstx, dsty, dst_layer,
                                    nv50_miptree(src), src_level,
                                    src_box->x, src_box->y, src_layer,
                                    src_box->width, src_box->height);
      if (ret)
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         break;
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   }
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   nouveau_bufctx_reset(nv50->bufctx, NV50_BIND_2D);
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}

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static void
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nv50_clear_render_target(struct pipe_context *pipe,
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                         struct pipe_surface *dst,
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			 const union pipe_color_union *color,
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                         unsigned dstx, unsigned dsty,
                         unsigned width, unsigned height)
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{
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   struct nv50_context *nv50 = nv50_context(pipe);
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   struct nouveau_pushbuf *push = nv50->base.pushbuf;
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   struct nv50_miptree *mt = nv50_miptree(dst->texture);
   struct nv50_surface *sf = nv50_surface(dst);
   struct nouveau_bo *bo = mt->base.bo;
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   unsigned z;
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   BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
   PUSH_DATAf(push, color->f[0]);
   PUSH_DATAf(push, color->f[1]);
   PUSH_DATAf(push, color->f[2]);
   PUSH_DATAf(push, color->f[3]);
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   if (nouveau_pushbuf_space(push, 32 + sf->depth, 1, 0))
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      return;
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   PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);

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   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
   PUSH_DATA (push, ( width << 16) | dstx);
   PUSH_DATA (push, (height << 16) | dsty);
   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
   PUSH_DATA (push, 8192 << 16);
   PUSH_DATA (push, 8192 << 16);
   nv50->scissors_dirty |= 1;

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   BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
   PUSH_DATA (push, 1);
   BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
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   PUSH_DATAh(push, mt->base.address + sf->offset);
   PUSH_DATA (push, mt->base.address + sf->offset);
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   PUSH_DATA (push, nv50_format_table[dst->format].rt);
   PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
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   PUSH_DATA (push, mt->layer_stride >> 2);
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   BEGIN_NV04(push, NV50_3D(RT_HORIZ(0)), 2);
   if (nouveau_bo_memtype(bo))
      PUSH_DATA(push, sf->width);
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   else
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      PUSH_DATA(push, NV50_3D_RT_HORIZ_LINEAR | mt->level[0].pitch);
   PUSH_DATA (push, sf->height);
   BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
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   if (mt->layout_3d)
      PUSH_DATA(push, NV50_3D_RT_ARRAY_MODE_MODE_3D | 512);
   else
      PUSH_DATA(push, 512);
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   if (!nouveau_bo_memtype(bo)) {
      BEGIN_NV04(push, NV50_3D(ZETA_ENABLE), 1);
      PUSH_DATA (push, 0);
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   }

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   /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */

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   BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(0)), 2);
   PUSH_DATA (push, (width << 16) | dstx);
   PUSH_DATA (push, (height << 16) | dsty);
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   BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), sf->depth);
   for (z = 0; z < sf->depth; ++z) {
      PUSH_DATA (push, 0x3c |
                 (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
   }
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   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
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}

static void
nv50_clear_depth_stencil(struct pipe_context *pipe,
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                         struct pipe_surface *dst,
                         unsigned clear_flags,
                         double depth,
                         unsigned stencil,
                         unsigned dstx, unsigned dsty,
                         unsigned width, unsigned height)
{
   struct nv50_context *nv50 = nv50_context(pipe);
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   struct nouveau_pushbuf *push = nv50->base.pushbuf;
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   struct nv50_miptree *mt = nv50_miptree(dst->texture);
   struct nv50_surface *sf = nv50_surface(dst);
   struct nouveau_bo *bo = mt->base.bo;
   uint32_t mode = 0;
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   unsigned z;
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   assert(nouveau_bo_memtype(bo)); /* ZETA cannot be linear */
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   if (clear_flags & PIPE_CLEAR_DEPTH) {
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      BEGIN_NV04(push, NV50_3D(CLEAR_DEPTH), 1);
      PUSH_DATAf(push, depth);
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      mode |= NV50_3D_CLEAR_BUFFERS_Z;
   }

   if (clear_flags & PIPE_CLEAR_STENCIL) {
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      BEGIN_NV04(push, NV50_3D(CLEAR_STENCIL), 1);
      PUSH_DATA (push, stencil & 0xff);
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      mode |= NV50_3D_CLEAR_BUFFERS_S;
   }
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   if (nouveau_pushbuf_space(push, 32 + sf->depth, 1, 0))
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      return;
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   PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);

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   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
   PUSH_DATA (push, ( width << 16) | dstx);
   PUSH_DATA (push, (height << 16) | dsty);
   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
   PUSH_DATA (push, 8192 << 16);
   PUSH_DATA (push, 8192 << 16);
   nv50->scissors_dirty |= 1;

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   BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
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   PUSH_DATAh(push, mt->base.address + sf->offset);
   PUSH_DATA (push, mt->base.address + sf->offset);
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   PUSH_DATA (push, nv50_format_table[dst->format].rt);
   PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
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   PUSH_DATA (push, mt->layer_stride >> 2);
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   BEGIN_NV04(push, NV50_3D(ZETA_ENABLE), 1);
   PUSH_DATA (push, 1);
   BEGIN_NV04(push, NV50_3D(ZETA_HORIZ), 3);
   PUSH_DATA (push, sf->width);
   PUSH_DATA (push, sf->height);
   PUSH_DATA (push, (1 << 16) | 1);

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   BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
   PUSH_DATA (push, 512);

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   BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(0)), 2);
   PUSH_DATA (push, (width << 16) | dstx);
   PUSH_DATA (push, (height << 16) | dsty);

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   BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), sf->depth);
   for (z = 0; z < sf->depth; ++z) {
      PUSH_DATA (push, mode |
                 (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
   }
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   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
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}

void
nv50_clear(struct pipe_context *pipe, unsigned buffers,
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           const union pipe_color_union *color,
           double depth, unsigned stencil)
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{
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   struct nv50_context *nv50 = nv50_context(pipe);
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   struct nouveau_pushbuf *push = nv50->base.pushbuf;
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   struct pipe_framebuffer_state *fb = &nv50->framebuffer;
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   unsigned i, j, k;
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   uint32_t mode = 0;

   /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
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   if (!nv50_state_validate(nv50, NV50_NEW_FRAMEBUFFER, 9 + (fb->nr_cbufs * 2)))
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      return;

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   /* We have to clear ALL of the layers, not up to the min number of layers
    * of any attachment. */
   BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
   PUSH_DATA (push, (nv50->rt_array_mode & NV50_3D_RT_ARRAY_MODE_MODE_3D) | 512);

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   if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
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      BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
      PUSH_DATAf(push, color->f[0]);
      PUSH_DATAf(push, color->f[1]);
      PUSH_DATAf(push, color->f[2]);
      PUSH_DATAf(push, color->f[3]);
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      if (buffers & PIPE_CLEAR_COLOR0)
         mode =
            NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G |
            NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A;
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   }

   if (buffers & PIPE_CLEAR_DEPTH) {
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      BEGIN_NV04(push, NV50_3D(CLEAR_DEPTH), 1);
      PUSH_DATA (push, fui(depth));
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      mode |= NV50_3D_CLEAR_BUFFERS_Z;
   }

   if (buffers & PIPE_CLEAR_STENCIL) {
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      BEGIN_NV04(push, NV50_3D(CLEAR_STENCIL), 1);
      PUSH_DATA (push, stencil & 0xff);
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      mode |= NV50_3D_CLEAR_BUFFERS_S;
   }

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   if (mode) {
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      int zs_layers = 0, color0_layers = 0;
      if (fb->cbufs[0] && (mode & 0x3c))
         color0_layers = fb->cbufs[0]->u.tex.last_layer -
            fb->cbufs[0]->u.tex.first_layer + 1;
      if (fb->zsbuf && (mode & ~0x3c))
         zs_layers = fb->zsbuf->u.tex.last_layer -
            fb->zsbuf->u.tex.first_layer + 1;

      for (j = 0; j < MIN2(zs_layers, color0_layers); j++) {
         BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
         PUSH_DATA(push, mode | (j << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
      }
      for (k = j; k < zs_layers; k++) {
         BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
         PUSH_DATA(push, (mode & ~0x3c) | (k << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
      }
      for (k = j; k < color0_layers; k++) {
         BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
         PUSH_DATA(push, (mode & 0x3c) | (k << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
      }
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   }
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   for (i = 1; i < fb->nr_cbufs; i++) {
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      struct pipe_surface *sf = fb->cbufs[i];
      if (!sf || !(buffers & (PIPE_CLEAR_COLOR0 << i)))
         continue;
      for (j = 0; j <= sf->u.tex.last_layer - sf->u.tex.first_layer; j++) {
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         BEGIN_NV04(push, NV50_3D(CLEAR_BUFFERS), 1);
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         PUSH_DATA (push, (i << 6) | 0x3c |
                    (j << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
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      }
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   }
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   /* restore the array mode */
   BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
   PUSH_DATA (push, nv50->rt_array_mode);
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}
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static void
nv50_clear_buffer(struct pipe_context *pipe,
                  struct pipe_resource *res,
                  unsigned offset, unsigned size,
                  const void *data, int data_size)
{
   struct nv50_context *nv50 = nv50_context(pipe);
   struct nouveau_pushbuf *push = nv50->base.pushbuf;
   struct nv04_resource *buf = (struct nv04_resource *)res;
   union pipe_color_union color;
   enum pipe_format dst_fmt;
   unsigned width, height, elements;

   assert(res->target == PIPE_BUFFER);
   assert(nouveau_bo_memtype(buf->bo) == 0);

   switch (data_size) {
   case 16:
      dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT;
      memcpy(&color.ui, data, 16);
      break;
   case 8:
      dst_fmt = PIPE_FORMAT_R32G32_UINT;
      memcpy(&color.ui, data, 8);
      memset(&color.ui[2], 0, 8);
      break;
   case 4:
      dst_fmt = PIPE_FORMAT_R32_UINT;
      memcpy(&color.ui, data, 4);
      memset(&color.ui[1], 0, 12);
      break;
   case 2:
      dst_fmt = PIPE_FORMAT_R16_UINT;
      color.ui[0] = util_cpu_to_le32(
            util_le16_to_cpu(*(unsigned short *)data));
      memset(&color.ui[1], 0, 12);
      break;
   case 1:
      dst_fmt = PIPE_FORMAT_R8_UINT;
      color.ui[0] = util_cpu_to_le32(*(unsigned char *)data);
      memset(&color.ui[1], 0, 12);
      break;
   default:
      assert(!"Unsupported element size");
      return;
   }

   assert(size % data_size == 0);

   elements = size / data_size;
   height = (elements + 8191) / 8192;
   width = elements / height;

   BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
   PUSH_DATAf(push, color.f[0]);
   PUSH_DATAf(push, color.f[1]);
   PUSH_DATAf(push, color.f[2]);
   PUSH_DATAf(push, color.f[3]);

   if (nouveau_pushbuf_space(push, 32, 1, 0))
      return;

   PUSH_REFN(push, buf->bo, buf->domain | NOUVEAU_BO_WR);

   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
   PUSH_DATA (push, width << 16);
   PUSH_DATA (push, height << 16);
   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
   PUSH_DATA (push, 8192 << 16);
   PUSH_DATA (push, 8192 << 16);
   nv50->scissors_dirty |= 1;

   BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
   PUSH_DATA (push, 1);
   BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
   PUSH_DATAh(push, buf->bo->offset + buf->offset + offset);
   PUSH_DATA (push, buf->bo->offset + buf->offset + offset);
   PUSH_DATA (push, nv50_format_table[dst_fmt].rt);
   PUSH_DATA (push, 0);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(RT_HORIZ(0)), 2);
   PUSH_DATA (push, NV50_3D_RT_HORIZ_LINEAR | (width * data_size));
   PUSH_DATA (push, height);
   BEGIN_NV04(push, NV50_3D(ZETA_ENABLE), 1);
   PUSH_DATA (push, 0);

   /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */

   BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(0)), 2);
   PUSH_DATA (push, (width << 16));
   PUSH_DATA (push, (height << 16));

   BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), 1);
   PUSH_DATA (push, 0x3c);

   if (width * height != elements) {
      offset += width * height * data_size;
      width = elements - width * height;
      height = 1;
      BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 2);
      PUSH_DATAh(push, buf->bo->offset + buf->offset + offset);
      PUSH_DATA (push, buf->bo->offset + buf->offset + offset);
      BEGIN_NV04(push, NV50_3D(RT_HORIZ(0)), 2);
      PUSH_DATA (push, NV50_3D_RT_HORIZ_LINEAR | (width * data_size));
      PUSH_DATA (push, height);
      BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), 1);
      PUSH_DATA (push, 0x3c);
   }

   nouveau_fence_ref(nv50->screen->base.fence.current, &buf->fence);
   nouveau_fence_ref(nv50->screen->base.fence.current, &buf->fence_wr);

   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
}
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/* =============================== BLIT CODE ===================================
 */

struct nv50_blitter
{
   struct nv50_program *fp[NV50_BLIT_MAX_TEXTURE_TYPES][NV50_BLIT_MODES];
   struct nv50_program vp;

   struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */

   pipe_mutex mutex;
};

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struct nv50_blitctx
{
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   struct nv50_context *nv50;
   struct nv50_program *fp;
   uint8_t mode;
   uint16_t color_mask;
   uint8_t filter;
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   uint8_t render_condition_enable;
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   enum pipe_texture_target target;
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   struct {
      struct pipe_framebuffer_state fb;
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      struct nv50_rasterizer_stateobj *rast;
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      struct nv50_program *vp;
      struct nv50_program *gp;
      struct nv50_program *fp;
      unsigned num_textures[3];
      unsigned num_samplers[3];
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      struct pipe_sampler_view *texture[2];
      struct nv50_tsc_entry *sampler[2];
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      unsigned min_samples;
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      uint32_t dirty;
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   } saved;
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   struct nv50_rasterizer_stateobj rast;
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};

static void
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nv50_blitter_make_vp(struct nv50_blitter *blit)
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{
   static const uint32_t code[] =
   {
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      0x10000001, 0x0423c788, /* mov b32 o[0x00] s[0x00] */ /* HPOS.x */
      0x10000205, 0x0423c788, /* mov b32 o[0x04] s[0x04] */ /* HPOS.y */
      0x10000409, 0x0423c788, /* mov b32 o[0x08] s[0x08] */ /* TEXC.x */
      0x1000060d, 0x0423c788, /* mov b32 o[0x0c] s[0x0c] */ /* TEXC.y */
      0x10000811, 0x0423c789, /* mov b32 o[0x10] s[0x10] */ /* TEXC.z */
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   };

   blit->vp.type = PIPE_SHADER_VERTEX;
   blit->vp.translated = TRUE;
   blit->vp.code = (uint32_t *)code; /* const_cast */
   blit->vp.code_size = sizeof(code);
   blit->vp.max_gpr = 4;
   blit->vp.max_out = 5;
   blit->vp.out_nr = 2;
   blit->vp.out[0].mask = 0x3;
   blit->vp.out[0].sn = TGSI_SEMANTIC_POSITION;
   blit->vp.out[1].hw = 2;
   blit->vp.out[1].mask = 0x7;
   blit->vp.out[1].sn = TGSI_SEMANTIC_GENERIC;
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   blit->vp.out[1].si = 0;
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   blit->vp.vp.attrs[0] = 0x73;
   blit->vp.vp.psiz = 0x40;
   blit->vp.vp.edgeflag = 0x40;
}

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void *
nv50_blitter_make_fp(struct pipe_context *pipe,
                     unsigned mode,
                     enum pipe_texture_target ptarg)
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{
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   struct ureg_program *ureg;
   struct ureg_src tc;
   struct ureg_dst out;
   struct ureg_dst data;

   const unsigned target = nv50_blit_get_tgsi_texture_target(ptarg);

   boolean tex_rgbaz = FALSE;
   boolean tex_s = FALSE;
   boolean cvt_un8 = FALSE;

   if (mode != NV50_BLIT_MODE_PASS &&
       mode != NV50_BLIT_MODE_Z24X8 &&
       mode != NV50_BLIT_MODE_X8Z24)
      tex_s = TRUE;

   if (mode != NV50_BLIT_MODE_X24S8 &&
       mode != NV50_BLIT_MODE_S8X24 &&
       mode != NV50_BLIT_MODE_XS)
      tex_rgbaz = TRUE;

   if (mode != NV50_BLIT_MODE_PASS &&
       mode != NV50_BLIT_MODE_ZS &&
       mode != NV50_BLIT_MODE_XS)
      cvt_un8 = TRUE;

   ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
   if (!ureg)
      return NULL;

   out = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0);
   tc = ureg_DECL_fs_input(
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      ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_LINEAR);
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   if (ptarg == PIPE_TEXTURE_1D_ARRAY) {
      /* Adjust coordinates. Depth is in z, but TEX expects it to be in y. */
      tc = ureg_swizzle(tc, TGSI_SWIZZLE_X, TGSI_SWIZZLE_Z,
                        TGSI_SWIZZLE_Z, TGSI_SWIZZLE_Z);
   }

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   data = ureg_DECL_temporary(ureg);

   if (tex_s) {
      ureg_TEX(ureg, ureg_writemask(data, TGSI_WRITEMASK_X),
               target, tc, ureg_DECL_sampler(ureg, 1));
      ureg_MOV(ureg, ureg_writemask(data, TGSI_WRITEMASK_Y),
               ureg_scalar(ureg_src(data), TGSI_SWIZZLE_X));
   }
   if (tex_rgbaz) {
      const unsigned mask = (mode == NV50_BLIT_MODE_PASS) ?
         TGSI_WRITEMASK_XYZW : TGSI_WRITEMASK_X;
      ureg_TEX(ureg, ureg_writemask(data, mask),
               target, tc, ureg_DECL_sampler(ureg, 0));
   }

   if (cvt_un8) {
      struct ureg_src mask;
      struct ureg_src scale;
      struct ureg_dst outz;
      struct ureg_dst outs;
      struct ureg_dst zdst3 = ureg_writemask(data, TGSI_WRITEMASK_XYZ);
      struct ureg_dst zdst = ureg_writemask(data, TGSI_WRITEMASK_X);
      struct ureg_dst sdst = ureg_writemask(data, TGSI_WRITEMASK_Y);
      struct ureg_src zsrc3 = ureg_src(data);
      struct ureg_src zsrc = ureg_scalar(zsrc3, TGSI_SWIZZLE_X);
      struct ureg_src ssrc = ureg_scalar(zsrc3, TGSI_SWIZZLE_Y);
      struct ureg_src zshuf;

      mask = ureg_imm3u(ureg, 0x0000ff, 0x00ff00, 0xff0000);
      scale = ureg_imm4f(ureg,
                         1.0f / 0x0000ff, 1.0f / 0x00ff00, 1.0f / 0xff0000,
                         (1 << 24) - 1);

      if (mode == NV50_BLIT_MODE_Z24S8 ||
          mode == NV50_BLIT_MODE_X24S8 ||
          mode == NV50_BLIT_MODE_Z24X8) {
         outz = ureg_writemask(out, TGSI_WRITEMASK_XYZ);
         outs = ureg_writemask(out, TGSI_WRITEMASK_W);
         zshuf = ureg_src(data);
      } else {
         outz = ureg_writemask(out, TGSI_WRITEMASK_YZW);
         outs = ureg_writemask(out, TGSI_WRITEMASK_X);
         zshuf = ureg_swizzle(zsrc3, TGSI_SWIZZLE_W,
                              TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Z);
      }
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      if (tex_s) {
         ureg_I2F(ureg, sdst, ssrc);
         ureg_MUL(ureg, outs, ssrc, ureg_scalar(scale, TGSI_SWIZZLE_X));
      }

      if (tex_rgbaz) {
         ureg_MUL(ureg, zdst, zsrc, ureg_scalar(scale, TGSI_SWIZZLE_W));
         ureg_F2I(ureg, zdst, zsrc);
         ureg_AND(ureg, zdst3, zsrc, mask);
         ureg_I2F(ureg, zdst3, zsrc3);
         ureg_MUL(ureg, zdst3, zsrc3, scale);
         ureg_MOV(ureg, outz, zshuf);
      }
   } else {
      unsigned mask = TGSI_WRITEMASK_XYZW;

      if (mode != NV50_BLIT_MODE_PASS) {
         mask &= ~TGSI_WRITEMASK_ZW;
         if (!tex_s)
            mask = TGSI_WRITEMASK_X;
         if (!tex_rgbaz)
            mask = TGSI_WRITEMASK_Y;
      }
      ureg_MOV(ureg, ureg_writemask(out, mask), ureg_src(data));
   }
   ureg_END(ureg);

   return ureg_create_shader_and_destroy(ureg, pipe);
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}

static void
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nv50_blitter_make_sampler(struct nv50_blitter *blit)
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{
   /* clamp to edge, min/max lod = 0, nearest filtering */

   blit->sampler[0].id = -1;

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   blit->sampler[0].tsc[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED |
      (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPS__SHIFT) |
      (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPT__SHIFT) |
      (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPR__SHIFT);
   blit->sampler[0].tsc[1] =
      NV50_TSC_1_MAGF_NEAREST | NV50_TSC_1_MINF_NEAREST | NV50_TSC_1_MIPF_NONE;
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   /* clamp to edge, min/max lod = 0, bilinear filtering */

   blit->sampler[1].id = -1;

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   blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0];
   blit->sampler[1].tsc[1] =
      NV50_TSC_1_MAGF_LINEAR | NV50_TSC_1_MINF_LINEAR | NV50_TSC_1_MIPF_NONE;
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}

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unsigned
nv50_blit_select_mode(const struct pipe_blit_info *info)
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{
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   const unsigned mask = info->mask;

   switch (info->dst.resource->format) {
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   case PIPE_FORMAT_Z24_UNORM_S8_UINT:
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   case PIPE_FORMAT_Z24X8_UNORM:
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   case PIPE_FORMAT_X24S8_UINT:
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      switch (mask & PIPE_MASK_ZS) {
      case PIPE_MASK_ZS: return NV50_BLIT_MODE_Z24S8;
      case PIPE_MASK_Z:  return NV50_BLIT_MODE_Z24X8;
      default:
         return NV50_BLIT_MODE_X24S8;
      }
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   case PIPE_FORMAT_S8_UINT_Z24_UNORM:
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   case PIPE_FORMAT_X8Z24_UNORM:
   case PIPE_FORMAT_S8X24_UINT:
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      switch (mask & PIPE_MASK_ZS) {
      case PIPE_MASK_ZS: return NV50_BLIT_MODE_S8Z24;
      case PIPE_MASK_Z:  return NV50_BLIT_MODE_X8Z24;
      default:
         return NV50_BLIT_MODE_S8X24;
      }
   case PIPE_FORMAT_Z32_FLOAT:
   case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
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   case PIPE_FORMAT_X32_S8X24_UINT:
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      switch (mask & PIPE_MASK_ZS) {
      case PIPE_MASK_ZS: return NV50_BLIT_MODE_ZS;
      case PIPE_MASK_Z:  return NV50_BLIT_MODE_PASS;
      default:
         return NV50_BLIT_MODE_XS;
      }
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   default:
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      return NV50_BLIT_MODE_PASS;
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   }
}

static void
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nv50_blit_select_fp(struct nv50_blitctx *ctx, const struct pipe_blit_info *info)
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{
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   struct nv50_blitter *blitter = ctx->nv50->screen->blitter;
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   const enum pipe_texture_target ptarg =
      nv50_blit_reinterpret_pipe_texture_target(info->src.resource->target);

   const unsigned targ = nv50_blit_texture_type(ptarg);
   const unsigned mode = ctx->mode;

   if (!blitter->fp[targ][mode]) {
      pipe_mutex_lock(blitter->mutex);
      if (!blitter->fp[targ][mode])
         blitter->fp[targ][mode] =
            nv50_blitter_make_fp(&ctx->nv50->base.pipe, mode, ptarg);
      pipe_mutex_unlock(blitter->mutex);
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   }
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   ctx->fp = blitter->fp[targ][mode];
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}

static void
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nv50_blit_set_dst(struct nv50_blitctx *ctx,
                  struct pipe_resource *res, unsigned level, unsigned layer,
                  enum pipe_format format)
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{
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   struct nv50_context *nv50 = ctx->nv50;
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   struct pipe_context *pipe = &nv50->base.pipe;
   struct pipe_surface templ;
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   if (util_format_is_depth_or_stencil(format))
      templ.format = nv50_blit_zeta_to_colour_format(format);
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   else
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      templ.format = format;
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   templ.u.tex.level = level;
   templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
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   if (layer == -1) {
      templ.u.tex.first_layer = 0;
      templ.u.tex.last_layer =
         (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
   }

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   nv50->framebuffer.cbufs[0] = nv50_miptree_surface_new(pipe, res, &templ);
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   nv50->framebuffer.nr_cbufs = 1;
   nv50->framebuffer.zsbuf = NULL;
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   nv50->framebuffer.width = nv50->framebuffer.cbufs[0]->width;
   nv50->framebuffer.height = nv50->framebuffer.cbufs[0]->height;
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}

static void
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nv50_blit_set_src(struct nv50_blitctx *blit,
                  struct pipe_resource *res, unsigned level, unsigned layer,
                  enum pipe_format format, const uint8_t filter)
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{
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   struct nv50_context *nv50 = blit->nv50;
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   struct pipe_context *pipe = &nv50->base.pipe;
   struct pipe_sampler_view templ;
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   uint32_t flags;
   enum pipe_texture_target target;
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   target = nv50_blit_reinterpret_pipe_texture_target(res->target);

   templ.format = format;
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   templ.u.tex.first_level = templ.u.tex.last_level = level;
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   templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
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   templ.swizzle_r = PIPE_SWIZZLE_RED;
   templ.swizzle_g = PIPE_SWIZZLE_GREEN;
   templ.swizzle_b = PIPE_SWIZZLE_BLUE;
   templ.swizzle_a = PIPE_SWIZZLE_ALPHA;

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   if (layer == -1) {
      templ.u.tex.first_layer = 0;
      templ.u.tex.last_layer =
         (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
   }
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   flags = res->last_level ? 0 : NV50_TEXVIEW_SCALED_COORDS;
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   flags |= NV50_TEXVIEW_ACCESS_RESOLVE;
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   if (filter && res->nr_samples == 8)
      flags |= NV50_TEXVIEW_FILTER_MSAA8;

   nv50->textures[2][0] = nv50_create_texture_view(
      pipe, res, &templ, flags, target);
   nv50->textures[2][1] = NULL;
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   nv50->num_textures[0] = nv50->num_textures[1] = 0;
   nv50->num_textures[2] = 1;
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   templ.format = nv50_zs_to_s_format(format);
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   if (templ.format != res->format) {
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      nv50->textures[2][1] = nv50_create_texture_view(
         pipe, res, &templ, flags, target);
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      nv50->num_textures[2] = 2;
   }
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}

static void
nv50_blitctx_prepare_state(struct nv50_blitctx *blit)
{
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   struct nouveau_pushbuf *push = blit->nv50->base.pushbuf;

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   if (blit->nv50->cond_query && !blit->render_condition_enable) {
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      BEGIN_NV04(push, NV50_3D(COND_MODE), 1);
      PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS);
   }
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   /* blend state */
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   BEGIN_NV04(push, NV50_3D(COLOR_MASK(0)), 1);
   PUSH_DATA (push, blit->color_mask);
   BEGIN_NV04(push, NV50_3D(BLEND_ENABLE(0)), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(LOGIC_OP_ENABLE), 1);
   PUSH_DATA (push, 0);
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   /* rasterizer state */
#ifndef NV50_SCISSORS_CLIPPING
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   BEGIN_NV04(push, NV50_3D(SCISSOR_ENABLE(0)), 1);
   PUSH_DATA (push, 1);
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#endif
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   BEGIN_NV04(push, NV50_3D(VERTEX_TWO_SIDE_ENABLE), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(FRAG_COLOR_CLAMP_EN), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(MULTISAMPLE_ENABLE), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(MSAA_MASK(0)), 4);
   PUSH_DATA (push, 0xffff);
   PUSH_DATA (push, 0xffff);
   PUSH_DATA (push, 0xffff);
   PUSH_DATA (push, 0xffff);
   BEGIN_NV04(push, NV50_3D(POLYGON_MODE_FRONT), 3);
   PUSH_DATA (push, NV50_3D_POLYGON_MODE_FRONT_FILL);
   PUSH_DATA (push, NV50_3D_POLYGON_MODE_BACK_FILL);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(CULL_FACE_ENABLE), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(POLYGON_STIPPLE_ENABLE), 1);
   PUSH_DATA (push, 0);
   BEGIN_NV04(push, NV50_3D(POLYGON_OFFSET_FILL_ENABLE), 1);