Compare revisions

Bas Nieuwenhuizen · Natalie Vock · Bas Nieuwenhuizen · Natalie Vock · Natalie Vock · Tatsuyuki Ishi
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -1456,6 +1456,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
   info->gfx12_supports_dcc_write_compress_disable = info->gfx_level >= GFX12 && info->drm_minor >= 60;

   info->has_stable_pstate = info->drm_minor >= 45;
+   info->has_explicit_sync_vm_ops = info->drm_minor >= 60;

   if (info->gfx_level >= GFX12) {
      /* Gfx12 doesn't use pc_lines and pbb_max_alloc_count. */
@@ -1996,6 +1997,7 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
   fprintf(f, "    has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
   fprintf(f, "    has_sparse_vm_mappings = %u\n", info->has_sparse_vm_mappings);
   fprintf(f, "    has_stable_pstate = %u\n", info->has_stable_pstate);
+   fprintf(f, "    has_explicit_sync_vm_ops = %u\n", info->has_explicit_sync_vm_ops);
   fprintf(f, "    has_gang_submit = %u\n", info->has_gang_submit);
   fprintf(f, "    has_gpuvm_fault_query = %u\n", info->has_gpuvm_fault_query);
   fprintf(f, "    register_shadowing_required = %u\n", info->register_shadowing_required);

--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -238,6 +238,7 @@ struct radeon_info {
   bool has_gpuvm_fault_query;
   bool has_pcie_bandwidth_info;
   bool has_stable_pstate;
+   bool has_explicit_sync_vm_ops;
   /* Whether SR-IOV is enabled or amdgpu.mcbp=1 was set on the kernel command line. */
   bool register_shadowing_required;
   bool has_tmz_support;

--- a/src/amd/vulkan/radv_buffer.c
+++ b/src/amd/vulkan/radv_buffer.c
@@ -274,14 +274,15 @@ radv_bo_destroy(struct radv_device *device, struct vk_object_base *object, struc

 VkResult
 radv_bo_virtual_bind(struct radv_device *device, struct vk_object_base *object, struct radeon_winsys_bo *parent,
-                     uint64_t offset, uint64_t size, struct radeon_winsys_bo *bo, uint64_t bo_offset)
+                     uint64_t offset, uint64_t size, struct radeon_winsys_bo *bo, uint64_t bo_offset, uint32_t wait_count,
+                     const struct vk_sync_wait *waits)
 {
   struct radv_physical_device *pdev = radv_device_physical(device);
   struct radv_instance *instance = radv_physical_device_instance(pdev);
   struct radeon_winsys *ws = device->ws;
   VkResult result;

-   result = ws->buffer_virtual_bind(ws, parent, offset, size, bo, bo_offset);
+   result = ws->buffer_virtual_bind(ws, parent, offset, size, bo, bo_offset, wait_count, waits);
   if (result != VK_SUCCESS)
      return result;


--- a/src/amd/vulkan/radv_buffer.h
+++ b/src/amd/vulkan/radv_buffer.h
@@ -37,7 +37,8 @@ VkResult radv_bo_create(struct radv_device *device, struct vk_object_base *objec

 VkResult radv_bo_virtual_bind(struct radv_device *device, struct vk_object_base *object,
                              struct radeon_winsys_bo *parent, uint64_t offset, uint64_t size,
-                              struct radeon_winsys_bo *bo, uint64_t bo_offset);
+                              struct radeon_winsys_bo *bo, uint64_t bo_offset, uint32_t wait_count,
+                              const struct vk_sync_wait *waits);

 void radv_bo_destroy(struct radv_device *device, struct vk_object_base *object, struct radeon_winsys_bo *bo);


--- a/src/amd/vulkan/radv_queue.c
+++ b/src/amd/vulkan/radv_queue.c
@@ -47,7 +47,8 @@ radv_get_queue_global_priority(const VkDeviceQueueGlobalPriorityCreateInfo *pObj
 }

 static VkResult
-radv_sparse_buffer_bind_memory(struct radv_device *device, const VkSparseBufferMemoryBindInfo *bind)
+radv_sparse_buffer_bind_memory(struct radv_device *device, const VkSparseBufferMemoryBindInfo *bind, uint32_t wait_count,
+                               const struct vk_sync_wait *waits)
 {
   VK_FROM_HANDLE(radv_buffer, buffer, bind->buffer);
   VkResult result = VK_SUCCESS;
@@ -77,7 +78,7 @@ radv_sparse_buffer_bind_memory(struct radv_device *device, const VkSparseBufferM
      }
      if (size) {
         result = radv_bo_virtual_bind(device, &buffer->vk.base, buffer->bo, resourceOffset, size, mem ? mem->bo : NULL,
-                                       memoryOffset);
+                                       memoryOffset, wait_count, waits);
         if (result != VK_SUCCESS)
            return result;
      }
@@ -88,14 +89,15 @@ radv_sparse_buffer_bind_memory(struct radv_device *device, const VkSparseBufferM
   }
   if (size) {
      result = radv_bo_virtual_bind(device, &buffer->vk.base, buffer->bo, resourceOffset, size, mem ? mem->bo : NULL,
-                                    memoryOffset);
+                                    memoryOffset, wait_count, waits);
   }

   return result;
 }

 static VkResult
-radv_sparse_image_opaque_bind_memory(struct radv_device *device, const VkSparseImageOpaqueMemoryBindInfo *bind)
+radv_sparse_image_opaque_bind_memory(struct radv_device *device, const VkSparseImageOpaqueMemoryBindInfo *bind, uint32_t wait_count,
+                                     const struct vk_sync_wait *waits)
 {
   VK_FROM_HANDLE(radv_image, image, bind->image);
   VkResult result;
@@ -107,7 +109,7 @@ radv_sparse_image_opaque_bind_memory(struct radv_device *device, const VkSparseI
         mem = radv_device_memory_from_handle(bind->pBinds[i].memory);

      result = radv_bo_virtual_bind(device, &image->vk.base, image->bindings[0].bo, bind->pBinds[i].resourceOffset,
-                                    bind->pBinds[i].size, mem ? mem->bo : NULL, bind->pBinds[i].memoryOffset);
+                                    bind->pBinds[i].size, mem ? mem->bo : NULL, bind->pBinds[i].memoryOffset, wait_count, waits);
      if (result != VK_SUCCESS)
         return result;
   }
@@ -116,7 +118,8 @@ radv_sparse_image_opaque_bind_memory(struct radv_device *device, const VkSparseI
 }

 static VkResult
-radv_sparse_image_bind_memory(struct radv_device *device, const VkSparseImageMemoryBindInfo *bind)
+radv_sparse_image_bind_memory(struct radv_device *device, const VkSparseImageMemoryBindInfo *bind, uint32_t wait_count,
+                              const struct vk_sync_wait *waits)
 {
   VK_FROM_HANDLE(radv_image, image, bind->image);
   const struct radv_physical_device *pdev = radv_device_physical(device);
@@ -169,7 +172,7 @@ radv_sparse_image_bind_memory(struct radv_device *device, const VkSparseImageMem
      if (whole_subres) {
         uint64_t size = (uint64_t)aligned_extent_width * aligned_extent_height * aligned_extent_depth * bs;
         result = radv_bo_virtual_bind(device, &image->vk.base, image->bindings[0].bo, offset, size,
-                                       mem ? mem->bo : NULL, mem_offset);
+                                       mem ? mem->bo : NULL, mem_offset, wait_count, waits);
         if (result != VK_SUCCESS)
            return result;
      } else {
@@ -184,7 +187,8 @@ radv_sparse_image_bind_memory(struct radv_device *device, const VkSparseImageMem

               result = radv_bo_virtual_bind(device, &image->vk.base, image->bindings[0].bo, bo_offset, size,
                                             mem ? mem->bo : NULL,
-                                             mem_offset + (uint64_t)mem_y_increment * y + mem_z_increment * z);
+                                             mem_offset + (uint64_t)mem_y_increment * y + mem_z_increment * z,
+                                             wait_count, waits);
               if (result != VK_SUCCESS)
                  return result;
            }
@@ -199,19 +203,22 @@ static VkResult
 radv_queue_submit_bind_sparse_memory(struct radv_device *device, struct vk_queue_submit *submission)
 {
   for (uint32_t i = 0; i < submission->buffer_bind_count; ++i) {
-      VkResult result = radv_sparse_buffer_bind_memory(device, submission->buffer_binds + i);
+      VkResult result = radv_sparse_buffer_bind_memory(device, submission->buffer_binds + i,
+                                                       submission->wait_count, submission->waits);
      if (result != VK_SUCCESS)
         return result;
   }

   for (uint32_t i = 0; i < submission->image_opaque_bind_count; ++i) {
-      VkResult result = radv_sparse_image_opaque_bind_memory(device, submission->image_opaque_binds + i);
+      VkResult result = radv_sparse_image_opaque_bind_memory(device, submission->image_opaque_binds + i,
+                                                             submission->wait_count, submission->waits);
      if (result != VK_SUCCESS)
         return result;
   }

   for (uint32_t i = 0; i < submission->image_bind_count; ++i) {
-      VkResult result = radv_sparse_image_bind_memory(device, submission->image_binds + i);
+      VkResult result = radv_sparse_image_bind_memory(device, submission->image_binds + i,
+                                                      submission->wait_count, submission->waits);
      if (result != VK_SUCCESS)
         return result;
   }
@@ -937,29 +944,31 @@ radv_init_graphics_state(struct radeon_cmdbuf *cs, struct radv_device *device)
 }

 static VkResult
-radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *device,
+radv_update_preamble_cs(struct radv_queue_state *queue_state, struct radv_queue *queue,
                        const struct radv_queue_ring_info *needs)
 {
+   struct radv_device *device = radv_queue_device(queue);
   const struct radv_physical_device *pdev = radv_device_physical(device);
   struct radeon_winsys *ws = device->ws;
-   struct radeon_winsys_bo *scratch_bo = queue->scratch_bo;
-   struct radeon_winsys_bo *descriptor_bo = queue->descriptor_bo;
-   struct radeon_winsys_bo *compute_scratch_bo = queue->compute_scratch_bo;
-   struct radeon_winsys_bo *esgs_ring_bo = queue->esgs_ring_bo;
-   struct radeon_winsys_bo *gsvs_ring_bo = queue->gsvs_ring_bo;
-   struct radeon_winsys_bo *tess_rings_bo = queue->tess_rings_bo;
-   struct radeon_winsys_bo *task_rings_bo = queue->task_rings_bo;
-   struct radeon_winsys_bo *mesh_scratch_ring_bo = queue->mesh_scratch_ring_bo;
-   struct radeon_winsys_bo *ge_rings_bo = queue->ge_rings_bo;
-   struct radeon_winsys_bo *gds_bo = queue->gds_bo;
-   struct radeon_winsys_bo *gds_oa_bo = queue->gds_oa_bo;
+   struct radeon_winsys_bo *scratch_bo = queue_state->scratch_bo;
+   struct radeon_winsys_bo *descriptor_bo = queue_state->descriptor_bo;
+   struct radeon_winsys_bo *compute_scratch_bo = queue_state->compute_scratch_bo;
+   struct radeon_winsys_bo *esgs_ring_bo = queue_state->esgs_ring_bo;
+   struct radeon_winsys_bo *gsvs_ring_bo = queue_state->gsvs_ring_bo;
+   struct radeon_winsys_bo *tess_rings_bo = queue_state->tess_rings_bo;
+   struct radeon_winsys_bo *task_rings_bo = queue_state->task_rings_bo;
+   struct radeon_winsys_bo *mesh_scratch_ring_bo = queue_state->mesh_scratch_ring_bo;
+   struct radeon_winsys_bo *ge_rings_bo = queue_state->ge_rings_bo;
+   struct radeon_winsys_bo *gds_bo = queue_state->gds_bo;
+   struct radeon_winsys_bo *gds_oa_bo = queue_state->gds_oa_bo;
   struct radeon_cmdbuf *dest_cs[3] = {0};
   const uint32_t ring_bo_flags = RADEON_FLAG_NO_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING;
   VkResult result = VK_SUCCESS;

-   const bool add_sample_positions = !queue->ring_info.sample_positions && needs->sample_positions;
+   const bool add_sample_positions = !queue_state->ring_info.sample_positions && needs->sample_positions;
   const uint32_t scratch_size = needs->scratch_size_per_wave * needs->scratch_waves;
-   const uint32_t queue_scratch_size = queue->ring_info.scratch_size_per_wave * queue->ring_info.scratch_waves;
+   const uint32_t queue_scratch_size =
+      queue_state->ring_info.scratch_size_per_wave * queue_state->ring_info.scratch_waves;

   if (scratch_size > queue_scratch_size) {
      result = radv_bo_create(device, NULL, scratch_size, 4096, RADEON_DOMAIN_VRAM, ring_bo_flags,
@@ -971,7 +980,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi

   const uint32_t compute_scratch_size = needs->compute_scratch_size_per_wave * needs->compute_scratch_waves;
   const uint32_t compute_queue_scratch_size =
-      queue->ring_info.compute_scratch_size_per_wave * queue->ring_info.compute_scratch_waves;
+      queue_state->ring_info.compute_scratch_size_per_wave * queue_state->ring_info.compute_scratch_waves;
   if (compute_scratch_size > compute_queue_scratch_size) {
      result = radv_bo_create(device, NULL, compute_scratch_size, 4096, RADEON_DOMAIN_VRAM, ring_bo_flags,
                              RADV_BO_PRIORITY_SCRATCH, 0, true, &compute_scratch_bo);
@@ -980,7 +989,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
      radv_rmv_log_command_buffer_bo_create(device, compute_scratch_bo, 0, 0, compute_scratch_size);
   }

-   if (needs->esgs_ring_size > queue->ring_info.esgs_ring_size) {
+   if (needs->esgs_ring_size > queue_state->ring_info.esgs_ring_size) {
      result = radv_bo_create(device, NULL, needs->esgs_ring_size, 4096, RADEON_DOMAIN_VRAM, ring_bo_flags,
                              RADV_BO_PRIORITY_SCRATCH, 0, true, &esgs_ring_bo);
      if (result != VK_SUCCESS)
@@ -988,7 +997,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
      radv_rmv_log_command_buffer_bo_create(device, esgs_ring_bo, 0, 0, needs->esgs_ring_size);
   }

-   if (needs->gsvs_ring_size > queue->ring_info.gsvs_ring_size) {
+   if (needs->gsvs_ring_size > queue_state->ring_info.gsvs_ring_size) {
      result = radv_bo_create(device, NULL, needs->gsvs_ring_size, 4096, RADEON_DOMAIN_VRAM, ring_bo_flags,
                              RADV_BO_PRIORITY_SCRATCH, 0, true, &gsvs_ring_bo);
      if (result != VK_SUCCESS)
@@ -996,7 +1005,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
      radv_rmv_log_command_buffer_bo_create(device, gsvs_ring_bo, 0, 0, needs->gsvs_ring_size);
   }

-   if (!queue->ring_info.tess_rings && needs->tess_rings) {
+   if (!queue_state->ring_info.tess_rings && needs->tess_rings) {
      uint64_t tess_rings_size = pdev->hs.tess_offchip_ring_offset + pdev->hs.tess_offchip_ring_size;
      result = radv_bo_create(device, NULL, tess_rings_size, 256, RADEON_DOMAIN_VRAM, ring_bo_flags,
                              RADV_BO_PRIORITY_SCRATCH, 0, true, &tess_rings_bo);
@@ -1005,7 +1014,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
      radv_rmv_log_command_buffer_bo_create(device, tess_rings_bo, 0, 0, tess_rings_size);
   }

-   if (!queue->ring_info.task_rings && needs->task_rings) {
+   if (!queue_state->ring_info.task_rings && needs->task_rings) {
      assert(pdev->info.gfx_level >= GFX10_3);

      /* We write the control buffer from the CPU, so need to grant CPU access to the BO.
@@ -1025,7 +1034,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         goto fail;
   }

-   if (!queue->ring_info.mesh_scratch_ring && needs->mesh_scratch_ring) {
+   if (!queue_state->ring_info.mesh_scratch_ring && needs->mesh_scratch_ring) {
      assert(pdev->info.gfx_level >= GFX10_3);
      result =
         radv_bo_create(device, NULL, RADV_MESH_SCRATCH_NUM_ENTRIES * RADV_MESH_SCRATCH_ENTRY_BYTES, 256,
@@ -1037,7 +1046,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
                                            RADV_MESH_SCRATCH_NUM_ENTRIES * RADV_MESH_SCRATCH_ENTRY_BYTES);
   }

-   if (!queue->ring_info.ge_rings && needs->ge_rings) {
+   if (!queue_state->ring_info.ge_rings && needs->ge_rings) {
      assert(pdev->info.gfx_level >= GFX11);
      result = radv_bo_create(device, NULL, pdev->info.total_attribute_pos_prim_ring_size, 2 * 1024 * 1024 /* 2MiB */,
                              RADEON_DOMAIN_VRAM, RADEON_FLAG_32BIT | RADEON_FLAG_DISCARDABLE | ring_bo_flags,
@@ -1047,7 +1056,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
      radv_rmv_log_command_buffer_bo_create(device, ge_rings_bo, 0, 0, pdev->info.total_attribute_pos_prim_ring_size);
   }

-   if (!queue->ring_info.gds && needs->gds) {
+   if (!queue_state->ring_info.gds && needs->gds) {
      assert(pdev->info.gfx_level >= GFX10 && pdev->info.gfx_level < GFX12);

      /* 4 streamout GDS counters.
@@ -1066,7 +1075,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         goto fail;
   }

-   if (!queue->ring_info.gds_oa && needs->gds_oa) {
+   if (!queue_state->ring_info.gds_oa && needs->gds_oa) {
      assert(pdev->info.gfx_level >= GFX10 && pdev->info.gfx_level < GFX12);

      result = radv_bo_create(device, NULL, 1, 1, RADEON_DOMAIN_OA, ring_bo_flags, RADV_BO_PRIORITY_SCRATCH, 0, true,
@@ -1088,11 +1097,11 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
    * when it uses the task shader rings. The task rings BO is shared between the
    * GFX and compute queues and already initialized here.
    */
-   if ((queue->qf == RADV_QUEUE_COMPUTE && !descriptor_bo && task_rings_bo) || scratch_bo != queue->scratch_bo ||
-       esgs_ring_bo != queue->esgs_ring_bo || gsvs_ring_bo != queue->gsvs_ring_bo ||
-       tess_rings_bo != queue->tess_rings_bo || task_rings_bo != queue->task_rings_bo ||
-       mesh_scratch_ring_bo != queue->mesh_scratch_ring_bo || ge_rings_bo != queue->ge_rings_bo ||
-       add_sample_positions) {
+   if ((queue_state->qf == RADV_QUEUE_COMPUTE && !descriptor_bo && task_rings_bo) ||
+       scratch_bo != queue_state->scratch_bo || esgs_ring_bo != queue_state->esgs_ring_bo ||
+       gsvs_ring_bo != queue_state->gsvs_ring_bo || tess_rings_bo != queue_state->tess_rings_bo ||
+       task_rings_bo != queue_state->task_rings_bo || mesh_scratch_ring_bo != queue_state->mesh_scratch_ring_bo ||
+       ge_rings_bo != queue_state->ge_rings_bo || add_sample_positions) {
      const uint32_t size = 304;

      result = radv_bo_create(device, NULL, size, 4096, RADEON_DOMAIN_VRAM,
@@ -1102,7 +1111,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         goto fail;
   }

-   if (descriptor_bo != queue->descriptor_bo) {
+   if (descriptor_bo != queue_state->descriptor_bo) {
      uint32_t *map = (uint32_t *)radv_buffer_map(ws, descriptor_bo);
      if (!map) {
         result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
@@ -1118,7 +1127,7 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
   for (int i = 0; i < 3; ++i) {
      enum rgp_flush_bits sqtt_flush_bits = 0;
      struct radeon_cmdbuf *cs = NULL;
-      cs = ws->cs_create(ws, radv_queue_family_to_ring(pdev, queue->qf), false);
+      cs = ws->cs_create(ws, radv_queue_family_to_ring(pdev, queue_state->qf), false);
      if (!cs) {
         result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
         goto fail;
@@ -1131,10 +1140,10 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         radv_cs_add_buffer(ws, cs, scratch_bo);

      /* Emit initial configuration. */
-      switch (queue->qf) {
+      switch (queue_state->qf) {
      case RADV_QUEUE_GENERAL:
-         if (queue->uses_shadow_regs)
-            radv_emit_shadow_regs_preamble(cs, device, queue);
+         if (queue_state->uses_shadow_regs)
+            radv_emit_shadow_regs_preamble(cs, device, queue_state);
         radv_init_graphics_state(cs, device);

         if (esgs_ring_bo || gsvs_ring_bo || tess_rings_bo || task_rings_bo) {
@@ -1181,11 +1190,11 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         if (i == 0) {
            /* The full flush preamble should also wait for previous shader work to finish. */
            flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH;
-            if (queue->qf == RADV_QUEUE_GENERAL)
+            if (queue_state->qf == RADV_QUEUE_GENERAL)
               flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
         }

-         radv_cs_emit_cache_flush(ws, cs, gfx_level, NULL, 0, queue->qf, flush_bits, &sqtt_flush_bits, 0);
+         radv_cs_emit_cache_flush(ws, cs, gfx_level, NULL, 0, queue_state->qf, flush_bits, &sqtt_flush_bits, 0);
      }

      result = ws->cs_finalize(cs);
@@ -1193,91 +1202,106 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi
         goto fail;
   }

-   if (queue->initial_full_flush_preamble_cs)
-      ws->cs_destroy(queue->initial_full_flush_preamble_cs);
+   if (queue_state->initial_full_flush_preamble_cs || queue_state->initial_preamble_cs ||
+       queue_state->continue_preamble_cs || scratch_bo != queue_state->scratch_bo ||
+       compute_scratch_bo != queue_state->compute_scratch_bo || esgs_ring_bo != queue_state->esgs_ring_bo ||
+       gsvs_ring_bo != queue_state->gsvs_ring_bo || descriptor_bo != queue_state->descriptor_bo) {

-   if (queue->initial_preamble_cs)
-      ws->cs_destroy(queue->initial_preamble_cs);
+      if (radv_device_physical(device)->info.has_explicit_sync_vm_ops) {
+         bool success =
+            device->ws->ctx_wait_idle(queue->hw_ctx, radv_queue_ring(queue), queue->vk.index_in_family);
+         if (!success) {
+            result = VK_ERROR_DEVICE_LOST;
+            goto fail;
+         }
+      }
+   }

-   if (queue->continue_preamble_cs)
-      ws->cs_destroy(queue->continue_preamble_cs);
+   if (queue_state->initial_full_flush_preamble_cs)
+      ws->cs_destroy(queue_state->initial_full_flush_preamble_cs);
+
+   if (queue_state->initial_preamble_cs)
+      ws->cs_destroy(queue_state->initial_preamble_cs);

-   queue->initial_full_flush_preamble_cs = dest_cs[0];
-   queue->initial_preamble_cs = dest_cs[1];
-   queue->continue_preamble_cs = dest_cs[2];
+   if (queue_state->continue_preamble_cs)
+      ws->cs_destroy(queue_state->continue_preamble_cs);

-   if (scratch_bo != queue->scratch_bo) {
-      if (queue->scratch_bo) {
-         radv_rmv_log_command_buffer_bo_destroy(device, queue->scratch_bo);
-         radv_bo_destroy(device, NULL, queue->scratch_bo);
+   queue_state->initial_full_flush_preamble_cs = dest_cs[0];
+   queue_state->initial_preamble_cs = dest_cs[1];
+   queue_state->continue_preamble_cs = dest_cs[2];
+
+   if (scratch_bo != queue_state->scratch_bo) {
+      if (queue_state->scratch_bo) {
+         radv_rmv_log_command_buffer_bo_destroy(device, queue_state->scratch_bo);
+         radv_bo_destroy(device, NULL, queue_state->scratch_bo);
      }
-      queue->scratch_bo = scratch_bo;
+      queue_state->scratch_bo = scratch_bo;
   }

-   if (compute_scratch_bo != queue->compute_scratch_bo) {
-      if (queue->compute_scratch_bo) {
-         radv_rmv_log_command_buffer_bo_destroy(device, queue->compute_scratch_bo);
-         radv_bo_destroy(device, NULL, queue->compute_scratch_bo);
+   if (compute_scratch_bo != queue_state->compute_scratch_bo) {
+      if (queue_state->compute_scratch_bo) {
+         radv_bo_destroy(device, NULL, queue_state->compute_scratch_bo);
+         radv_rmv_log_command_buffer_bo_destroy(device, queue_state->compute_scratch_bo);
      }
-      queue->compute_scratch_bo = compute_scratch_bo;
+      queue_state->compute_scratch_bo = compute_scratch_bo;
   }

-   if (esgs_ring_bo != queue->esgs_ring_bo) {
-      if (queue->esgs_ring_bo) {
-         radv_rmv_log_command_buffer_bo_destroy(device, queue->esgs_ring_bo);
-         radv_bo_destroy(device, NULL, queue->esgs_ring_bo);
+   if (esgs_ring_bo != queue_state->esgs_ring_bo) {
+      if (queue_state->esgs_ring_bo) {
+         radv_rmv_log_command_buffer_bo_destroy(device, queue_state->esgs_ring_bo);
+         ws->buffer_destroy(ws, queue_state->esgs_ring_bo);
      }
-      queue->esgs_ring_bo = esgs_ring_bo;
+      queue_state->esgs_ring_bo = esgs_ring_bo;
   }

-   if (gsvs_ring_bo != queue->gsvs_ring_bo) {
-      if (queue->gsvs_ring_bo) {
-         radv_rmv_log_command_buffer_bo_destroy(device, queue->gsvs_ring_bo);
-         radv_bo_destroy(device, NULL, queue->gsvs_ring_bo);
+   if (gsvs_ring_bo != queue_state->gsvs_ring_bo) {
+      if (queue_state->gsvs_ring_bo) {
+         radv_rmv_log_command_buffer_bo_destroy(device, queue_state->gsvs_ring_bo);
+         radv_bo_destroy(device, NULL, queue_state->gsvs_ring_bo);
      }
-      queue->gsvs_ring_bo = gsvs_ring_bo;
+      queue_state->gsvs_ring_bo = gsvs_ring_bo;
   }

-   if (descriptor_bo != queue->descriptor_bo) {
-      if (queue->descriptor_bo)
-         radv_bo_destroy(device, NULL, queue->descriptor_bo);
-      queue->descriptor_bo = descriptor_bo;
+   if (descriptor_bo != queue_state->descriptor_bo) {
+      if (queue_state->descriptor_bo)
+         radv_bo_destroy(device, NULL, queue_state->descriptor_bo);
+      queue_state->descriptor_bo = descriptor_bo;
   }

-   queue->tess_rings_bo = tess_rings_bo;
-   queue->task_rings_bo = task_rings_bo;
-   queue->mesh_scratch_ring_bo = mesh_scratch_ring_bo;
-   queue->ge_rings_bo = ge_rings_bo;
-   queue->gds_bo = gds_bo;
-   queue->gds_oa_bo = gds_oa_bo;
-   queue->ring_info = *needs;
+   queue_state->tess_rings_bo = tess_rings_bo;
+   queue_state->task_rings_bo = task_rings_bo;
+   queue_state->mesh_scratch_ring_bo = mesh_scratch_ring_bo;
+   queue_state->ge_rings_bo = ge_rings_bo;
+   queue_state->gds_bo = gds_bo;
+   queue_state->gds_oa_bo = gds_oa_bo;
+   queue_state->ring_info = *needs;
   return VK_SUCCESS;
 fail:
   for (int i = 0; i < ARRAY_SIZE(dest_cs); ++i)
      if (dest_cs[i])
         ws->cs_destroy(dest_cs[i]);
-   if (descriptor_bo && descriptor_bo != queue->descriptor_bo)
+   if (descriptor_bo && descriptor_bo != queue_state->descriptor_bo)
      radv_bo_destroy(device, NULL, descriptor_bo);
-   if (scratch_bo && scratch_bo != queue->scratch_bo)
+   if (scratch_bo && scratch_bo != queue_state->scratch_bo)
      radv_bo_destroy(device, NULL, scratch_bo);
-   if (compute_scratch_bo && compute_scratch_bo != queue->compute_scratch_bo)
+   if (compute_scratch_bo && compute_scratch_bo != queue_state->compute_scratch_bo)
      radv_bo_destroy(device, NULL, compute_scratch_bo);
-   if (esgs_ring_bo && esgs_ring_bo != queue->esgs_ring_bo)
+   if (esgs_ring_bo && esgs_ring_bo != queue_state->esgs_ring_bo)
      radv_bo_destroy(device, NULL, esgs_ring_bo);
-   if (gsvs_ring_bo && gsvs_ring_bo != queue->gsvs_ring_bo)
+   if (gsvs_ring_bo && gsvs_ring_bo != queue_state->gsvs_ring_bo)
      radv_bo_destroy(device, NULL, gsvs_ring_bo);
-   if (tess_rings_bo && tess_rings_bo != queue->tess_rings_bo)
+   if (tess_rings_bo && tess_rings_bo != queue_state->tess_rings_bo)
      radv_bo_destroy(device, NULL, tess_rings_bo);
-   if (task_rings_bo && task_rings_bo != queue->task_rings_bo)
+   if (task_rings_bo && task_rings_bo != queue_state->task_rings_bo)
      radv_bo_destroy(device, NULL, task_rings_bo);
-   if (ge_rings_bo && ge_rings_bo != queue->ge_rings_bo)
+   if (ge_rings_bo && ge_rings_bo != queue_state->ge_rings_bo)
      radv_bo_destroy(device, NULL, ge_rings_bo);
-   if (gds_bo && gds_bo != queue->gds_bo) {
-      ws->buffer_make_resident(ws, queue->gds_bo, false);
+   if (gds_bo && gds_bo != queue_state->gds_bo) {
+      ws->buffer_make_resident(ws, queue_state->gds_bo, false);
      radv_bo_destroy(device, NULL, gds_bo);
   }
-   if (gds_oa_bo && gds_oa_bo != queue->gds_oa_bo) {
-      ws->buffer_make_resident(ws, queue->gds_oa_bo, false);
+   if (gds_oa_bo && gds_oa_bo != queue_state->gds_oa_bo) {
+      ws->buffer_make_resident(ws, queue_state->gds_oa_bo, false);
      radv_bo_destroy(device, NULL, gds_oa_bo);
   }

@@ -1285,19 +1309,19 @@ fail:
 }

 static VkResult
-radv_update_preambles(struct radv_queue_state *queue, struct radv_device *device,
+radv_update_preambles(struct radv_queue_state *queue_state, struct radv_queue *queue,
                      struct vk_command_buffer *const *cmd_buffers, uint32_t cmd_buffer_count, bool *use_perf_counters,
                      bool *has_follower)
 {
+   struct radv_device *device = radv_queue_device(queue);
   const struct radv_physical_device *pdev = radv_device_physical(device);

-   if (queue->qf != RADV_QUEUE_GENERAL && queue->qf != RADV_QUEUE_COMPUTE) {
+   if (queue_state->qf != RADV_QUEUE_GENERAL && queue_state->qf != RADV_QUEUE_COMPUTE) {
      for (uint32_t j = 0; j < cmd_buffer_count; j++) {
         struct radv_cmd_buffer *cmd_buffer = container_of(cmd_buffers[j], struct radv_cmd_buffer, vk);

         *has_follower |= !!cmd_buffer->gang.cs;
      }
-
      return VK_SUCCESS;
   }

@@ -1307,7 +1331,7 @@ radv_update_preambles(struct radv_queue_state *queue, struct radv_device *device
    * - Grow when the newly needed amount is larger than what we had
    * - Allocate the max size and reuse it, but don't free it until the queue is destroyed
    */
-   struct radv_queue_ring_info needs = queue->ring_info;
+   struct radv_queue_ring_info needs = queue_state->ring_info;
   *use_perf_counters = false;
   *has_follower = false;

@@ -1339,7 +1363,7 @@ radv_update_preambles(struct radv_queue_state *queue, struct radv_device *device
         ? MIN2(needs.compute_scratch_waves, UINT32_MAX / needs.compute_scratch_size_per_wave)
         : 0;

-   if (pdev->info.gfx_level >= GFX11 && queue->qf == RADV_QUEUE_GENERAL) {
+   if (pdev->info.gfx_level >= GFX11 && queue_state->qf == RADV_QUEUE_GENERAL) {
      needs.ge_rings = true;
   }

@@ -1347,19 +1371,19 @@ radv_update_preambles(struct radv_queue_state *queue, struct radv_device *device
    * Note that it's not possible for any of the needed values to be less
    * than what the queue already had, because we only ever increase the allocated size.
    */
-   if (queue->initial_full_flush_preamble_cs && queue->ring_info.scratch_size_per_wave == needs.scratch_size_per_wave &&
-       queue->ring_info.scratch_waves == needs.scratch_waves &&
-       queue->ring_info.compute_scratch_size_per_wave == needs.compute_scratch_size_per_wave &&
-       queue->ring_info.compute_scratch_waves == needs.compute_scratch_waves &&
-       queue->ring_info.esgs_ring_size == needs.esgs_ring_size &&
-       queue->ring_info.gsvs_ring_size == needs.gsvs_ring_size && queue->ring_info.tess_rings == needs.tess_rings &&
-       queue->ring_info.task_rings == needs.task_rings &&
-       queue->ring_info.mesh_scratch_ring == needs.mesh_scratch_ring && queue->ring_info.ge_rings == needs.ge_rings &&
-       queue->ring_info.gds == needs.gds && queue->ring_info.gds_oa == needs.gds_oa &&
-       queue->ring_info.sample_positions == needs.sample_positions)
+   if (queue_state->initial_full_flush_preamble_cs && queue_state->ring_info.scratch_size_per_wave == needs.scratch_size_per_wave &&
+       queue_state->ring_info.scratch_waves == needs.scratch_waves &&
+       queue_state->ring_info.compute_scratch_size_per_wave == needs.compute_scratch_size_per_wave &&
+       queue_state->ring_info.compute_scratch_waves == needs.compute_scratch_waves &&
+       queue_state->ring_info.esgs_ring_size == needs.esgs_ring_size &&
+       queue_state->ring_info.gsvs_ring_size == needs.gsvs_ring_size && queue_state->ring_info.tess_rings == needs.tess_rings &&
+       queue_state->ring_info.task_rings == needs.task_rings &&
+       queue_state->ring_info.mesh_scratch_ring == needs.mesh_scratch_ring && queue_state->ring_info.ge_rings == needs.ge_rings &&
+       queue_state->ring_info.gds == needs.gds && queue_state->ring_info.gds_oa == needs.gds_oa &&
+       queue_state->ring_info.sample_positions == needs.sample_positions)
      return VK_SUCCESS;

-   return radv_update_preamble_cs(queue, device, &needs);
+   return radv_update_preamble_cs(queue_state, queue, &needs);
 }

 /**
@@ -1530,8 +1554,6 @@ radv_queue_init_follower_state(struct radv_queue *queue)
 static VkResult
 radv_update_gang_preambles(struct radv_queue *queue)
 {
-   struct radv_device *device = radv_queue_device(queue);
-
   if (!radv_queue_init_follower_state(queue))
      return VK_ERROR_OUT_OF_HOST_MEMORY;

@@ -1553,7 +1575,7 @@ radv_update_gang_preambles(struct radv_queue *queue)
   needs.compute_scratch_waves = queue->state.ring_info.scratch_waves;
   needs.task_rings = queue->state.ring_info.task_rings;

-   r = radv_update_preamble_cs(queue->follower_state, device, &needs);
+   r = radv_update_preamble_cs(queue->follower_state, queue, &needs);
   if (r != VK_SUCCESS)
      return r;

@@ -1672,7 +1694,7 @@ radv_queue_submit_normal(struct radv_queue *queue, struct vk_queue_submit *submi
   uint32_t wait_count = submission->wait_count;
   struct vk_sync_wait *waits = submission->waits;

-   result = radv_update_preambles(&queue->state, device, submission->command_buffers, submission->command_buffer_count,
+   result = radv_update_preambles(&queue->state, queue, submission->command_buffers, submission->command_buffer_count,
                                  &use_perf_counters, &use_ace);
   if (result != VK_SUCCESS)
      return result;

--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -261,7 +261,8 @@ struct radeon_winsys {
   void (*buffer_get_metadata)(struct radeon_winsys *ws, struct radeon_winsys_bo *bo, struct radeon_bo_metadata *md);

   VkResult (*buffer_virtual_bind)(struct radeon_winsys *ws, struct radeon_winsys_bo *parent, uint64_t offset,
-                                   uint64_t size, struct radeon_winsys_bo *bo, uint64_t bo_offset);
+                                   uint64_t size, struct radeon_winsys_bo *bo, uint64_t bo_offset, uint32_t wait_count,
+                                   const struct vk_sync_wait *waits);

   VkResult (*buffer_make_resident)(struct radeon_winsys *ws, struct radeon_winsys_bo *bo, bool resident);


--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
@@ -29,12 +29,36 @@
 #include "util/u_math.h"
 #include "util/u_memory.h"

+#include "vk_drm_syncobj.h"
+#include "vk_sync_dummy.h"
+
 static void radv_amdgpu_winsys_bo_destroy(struct radeon_winsys *_ws, struct radeon_winsys_bo *_bo);

 static int
 radv_amdgpu_bo_va_op(struct radv_amdgpu_winsys *ws, uint32_t bo_handle, uint64_t offset, uint64_t size, uint64_t addr,
-                     uint32_t bo_flags, uint64_t internal_flags, uint32_t ops)
+                     uint32_t bo_flags, uint64_t internal_flags, uint32_t ops, uint32_t wait_count,
+                     const struct vk_sync_wait *waits)
 {
+   uint64_t wait_idx = 0;
+
+   STACK_ARRAY(uint64_t, wait_points, wait_count);
+   STACK_ARRAY(uint32_t, wait_syncobj, wait_count);
+
+   if (!wait_points || !wait_syncobj)
+      return -ENOMEM;
+
+   if (ws->info.has_explicit_sync_vm_ops) {
+      for (uint32_t i = 0; i < wait_count; ++i) {
+         if (waits[i].sync->type == &vk_sync_dummy_type)
+            continue;
+
+         assert(waits[i].sync->type == &ws->syncobj_sync_type);
+         wait_syncobj[wait_idx] = ((struct vk_drm_syncobj *)waits[i].sync)->syncobj;
+         wait_points[wait_idx] = waits[i].wait_value;
+         ++wait_idx;
+      }
+   }
+
   uint64_t flags = internal_flags;
   if (bo_handle) {
      flags = AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_EXECUTABLE;
@@ -48,7 +72,11 @@ radv_amdgpu_bo_va_op(struct radv_amdgpu_winsys *ws, uint32_t bo_handle, uint64_t

   size = align64(size, getpagesize());

-   return ac_drm_bo_va_op_raw(ws->dev, bo_handle, offset, size, addr, flags, ops);
+   if (ws->info.has_explicit_sync_vm_ops)
+      return ac_drm_bo_va_op_raw2(ws->dev, bo_handle, offset, size, addr, flags, ops, 0, 0, wait_idx,
+                                  (uint64_t)wait_syncobj);
+   else
+      return ac_drm_bo_va_op_raw(ws->dev, bo_handle, offset, size, addr, flags, ops);
 }

 static int
@@ -124,7 +152,8 @@ radv_amdgpu_log_va_op(struct radv_amdgpu_winsys *ws,

 static VkResult
 radv_amdgpu_winsys_bo_virtual_bind(struct radeon_winsys *_ws, struct radeon_winsys_bo *_parent, uint64_t offset,
-                                   uint64_t size, struct radeon_winsys_bo *_bo, uint64_t bo_offset)
+                                   uint64_t size, struct radeon_winsys_bo *_bo, uint64_t bo_offset, uint32_t wait_count,
+                                   const struct vk_sync_wait *waits)
 {
   struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
   struct radv_amdgpu_winsys_bo *parent = (struct radv_amdgpu_winsys_bo *)_parent;
@@ -143,10 +172,12 @@ radv_amdgpu_winsys_bo_virtual_bind(struct radeon_winsys *_ws, struct radeon_wins
    */
   if (bo) {
      r =
-         radv_amdgpu_bo_va_op(ws, bo->bo_handle, bo_offset, size, parent->base.va + offset, 0, 0, AMDGPU_VA_OP_REPLACE);
+         radv_amdgpu_bo_va_op(ws, bo->bo_handle, bo_offset, size, parent->base.va + offset, 0, 0, AMDGPU_VA_OP_REPLACE,
+                               wait_count, waits);
      radv_amdgpu_log_va_op(ws, bo, bo_offset, size, parent->base.va + offset);
   } else {
-      r = radv_amdgpu_bo_va_op(ws, 0, 0, size, parent->base.va + offset, 0, AMDGPU_VM_PAGE_PRT, AMDGPU_VA_OP_REPLACE);
+      r = radv_amdgpu_bo_va_op(ws, 0, 0, size, parent->base.va + offset, 0, AMDGPU_VM_PAGE_PRT, AMDGPU_VA_OP_REPLACE,
+                               wait_count, waits);
      radv_amdgpu_log_va_op(ws, NULL, 0, size, parent->base.va + offset);
   }

@@ -340,7 +371,7 @@ radv_amdgpu_winsys_bo_destroy(struct radeon_winsys *_ws, struct radeon_winsys_bo
      int r;

      /* Clear mappings of this PRT VA region. */
-      r = radv_amdgpu_bo_va_op(ws, 0, 0, bo->base.size, bo->base.va, 0, 0, AMDGPU_VA_OP_CLEAR);
+      r = radv_amdgpu_bo_va_op(ws, 0, 0, bo->base.size, bo->base.va, 0, 0, AMDGPU_VA_OP_CLEAR, 0, NULL);
      if (r) {
         fprintf(stderr, "radv/amdgpu: Failed to clear a PRT VA region (%d).\n", r);
      }
@@ -354,7 +385,7 @@ radv_amdgpu_winsys_bo_destroy(struct radeon_winsys *_ws, struct radeon_winsys_bo

      if (ws->debug_all_bos)
         radv_amdgpu_global_bo_list_del(ws, bo);
-      radv_amdgpu_bo_va_op(ws, bo->bo_handle, 0, bo->base.size, bo->base.va, 0, 0, AMDGPU_VA_OP_UNMAP);
+      radv_amdgpu_bo_va_op(ws, bo->bo_handle, 0, bo->base.size, bo->base.va, 0, 0, AMDGPU_VA_OP_UNMAP, 0, NULL);
      ac_drm_bo_free(ws->dev, bo->bo);
   }

@@ -436,7 +467,7 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, uint64_t size, unsigned
      bo->ranges[0].bo_offset = 0;

      /* Reserve a PRT VA region. */
-      r = radv_amdgpu_bo_va_op(ws, 0, 0, size, bo->base.va, 0, AMDGPU_VM_PAGE_PRT, AMDGPU_VA_OP_MAP);
+      r = radv_amdgpu_bo_va_op(ws, 0, 0, size, bo->base.va, 0, AMDGPU_VM_PAGE_PRT, AMDGPU_VA_OP_MAP, 0, NULL);
      if (r) {
         fprintf(stderr, "radv/amdgpu: Failed to reserve a PRT VA region (%d).\n", r);
         result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
@@ -532,7 +563,7 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, uint64_t size, unsigned
   r = ac_drm_bo_export(ws->dev, buf_handle, amdgpu_bo_handle_type_kms, &kms_handle);
   assert(!r);

-   r = radv_amdgpu_bo_va_op(ws, kms_handle, 0, size, va, flags, 0, AMDGPU_VA_OP_MAP);
+   r = radv_amdgpu_bo_va_op(ws, kms_handle, 0, size, va, flags, 0, AMDGPU_VA_OP_MAP, 0, NULL);
   if (r) {
      result = VK_ERROR_UNKNOWN;
      goto error_va_map;
@@ -808,7 +839,7 @@ radv_amdgpu_winsys_bo_from_fd(struct radeon_winsys *_ws, int fd, unsigned priori
      goto error_query;
   }

-   r = radv_amdgpu_bo_va_op(ws, kms_handle, 0, result.alloc_size, va, 0, 0, AMDGPU_VA_OP_MAP);
+   r = radv_amdgpu_bo_va_op(ws, kms_handle, 0, result.alloc_size, va, 0, 0, AMDGPU_VA_OP_MAP, 0, NULL);
   if (r) {
      vk_result = VK_ERROR_UNKNOWN;
      goto error_va_map;
No results found