Commit 3e321e67 authored by Alyssa Rosenzweig's avatar Alyssa Rosenzweig 💜

Cache swizzled textures

parent 63d1ca2d
......@@ -871,31 +871,9 @@ trans_emit_for_draw(struct panfrost_context *ctx)
struct pipe_resource *tex_rsrc = ctx->sampler_views[t][i]->base.texture;
struct panfrost_resource *rsrc = (struct panfrost_resource *) tex_rsrc;
int bpp = 4; /* XXX: Not just RGBA32 */
int stride = rsrc->base.width0 * bpp; /* TODO: Alignment? */
/* Pointer filled in by memory allocator */
mali_ptr bitmap = NULL;
/* Estimate swizzled bitmap size. Slight
* overestimates are fine. Underestimates will
* result in memory corruption or worse. */
int swizzled_sz = trans_swizzled_size(rsrc->base.width0, rsrc->base.height0, bpp);
/* Allocate the transfer given that known size
* but do not do any copying */
uint8_t *swizzled = panfrost_allocate_transfer(&ctx->textures, swizzled_sz, &bitmap);
/* Run actual texture swizzle, writing directly
* to the mapped GPU chunk we allocated */
trans_texture_swizzle(rsrc->base.width0, rsrc->base.height0, bpp, stride, (uint8_t *) rsrc->cpu, swizzled);
/* Inject the address in. XXX: Should be its own dirty flag or something... */
ctx->sampler_views[t][i]->hw.swizzled_bitmap_0 = bitmap;
ctx->sampler_views[t][i]->hw.swizzled_bitmap_1 = bitmap;
/* Inject the address in. */
ctx->sampler_views[t][i]->hw.swizzled_bitmap_0 = rsrc->gpu;
ctx->sampler_views[t][i]->hw.swizzled_bitmap_1 = rsrc->gpu;
trampolines[i] = panfrost_upload(&ctx->cmdstream, &ctx->sampler_views[t][0]->hw, sizeof(struct mali_texture_descriptor), false);
}
......@@ -1629,10 +1607,39 @@ panfrost_transfer_map(struct pipe_context *pctx,
return ((uint8_t *) rsrc->cpu) + transfer->box.x + transfer->box.y * transfer->stride;
}
static void
panfrost_tile_texture(struct panfrost_context *ctx, struct panfrost_resource *rsrc)
{
int bpp = 4; /* XXX: Not just RGBA32 */
int stride = rsrc->base.width0 * bpp; /* TODO: Alignment? */
/* Estimate swizzled bitmap size. Slight overestimates are fine.
* Underestimates will result in memory corruption or worse. */
int swizzled_sz = trans_swizzled_size(rsrc->base.width0, rsrc->base.height0, bpp);
/* Allocate the transfer given that known size but do not copy */
uint8_t *swizzled = panfrost_allocate_transfer(&ctx->textures, swizzled_sz, &rsrc->gpu);
/* Run actual texture swizzle, writing directly to the mapped GPU chunk
* we allocated */
trans_texture_swizzle(rsrc->base.width0, rsrc->base.height0, bpp, stride, (uint8_t *) rsrc->cpu, swizzled);
}
static void
panfrost_transfer_unmap(struct pipe_context *pctx,
struct pipe_transfer *transfer)
{
struct panfrost_context *ctx = panfrost_context(pctx);
if (transfer->usage & PIPE_TRANSFER_WRITE) {
if (transfer->resource->target == PIPE_TEXTURE_2D) {
/* Gallium thinks writeback happens here; instead, this is our cue to tile */
panfrost_tile_texture(ctx, (struct panfrost_resource *) transfer->resource);
}
}
/* XXX */
//free(transfer);
}
......
......@@ -179,8 +179,15 @@ struct panfrost_resource {
struct pipe_resource base;
/* Address to the resource in question */
void *cpu;
size_t len;
/* Not necessarily a GPU mapping of cpu! In case of texture tiling, gpu
* points to the GPU-side, tiled texture, while cpu points to the
* CPU-side, untiled texture from mesa */
mali_ptr gpu;
};
static inline struct panfrost_context *
......
......@@ -134,10 +134,12 @@ int main(int argc, const char **argv)
templ.width0 = 568;
templ.height0 = 770;
templ.depth0 = 1;
templ.target = PIPE_TEXTURE_2D;
struct pipe_transfer *transfer4;
struct pipe_resource *tbuf = screen->resource_create(screen, &templ);
memcpy(gallium->transfer_map(gallium, tbuf, 0, 0, &box, &transfer4), bitmap_data, sizeof(bitmap_data));
memcpy(gallium->transfer_map(gallium, tbuf, 0, PIPE_TRANSFER_WRITE, &box, &transfer4), bitmap_data, sizeof(bitmap_data));
gallium->transfer_unmap(gallium, transfer4);
void *tex = gallium->create_sampler_view(gallium, tbuf, &_sampler_view);
void *samp = gallium->create_sampler_state(gallium, &sampler_state);
......
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