Commit 2eb236fa authored by Alyssa Rosenzweig's avatar Alyssa Rosenzweig 💜

Expand out uniform_count field

parent 18c297c0
......@@ -64,19 +64,22 @@ enum mali_gl_mode {
struct mali_shader_meta {
mali_ptr shader;
u32 zero;
u32 zero1;
/* Counted as number of address slots (i.e. half-precision vec4's) */
u16 attribute_count;
u16 varying_count;
/* Format here is very weird and only partially understood, but in a 32-bit hex word:
* .XXY.... is the known format, where X is the whole number of uniform
* registers used, times two. Y is the number of work registers used
* (no scale). The other bits are unknown but nonzero.
/* 0x20000600, 0x20000001, etc... not sure */
u16 unknown1;
/* Whole number of uniform registers used, times two; whole number of
* work registers used (no scale).
*/
u32 uniform_registers;
unsigned work_count : 5;
unsigned uniform_count : 5;
unsigned unknown2 : 6;
/* TODO: Is this a different data structure I don't yet know about? */
u32 unknown2_0;
......@@ -89,7 +92,7 @@ struct mali_shader_meta {
u32 unknown2_7;
u32 unknown2_8;
u32 unknown2_9;
};
} __attribute__((packed));
/* This only concerns hardware jobs */
......
......@@ -277,20 +277,20 @@ void panwrap_replay_vertex_or_tiler_job(const struct mali_job_descriptor_header
panwrap_prop("shader = (%s) | %d", a, (int) (s->shader & 15));
free(a);
if (s->zero)
panwrap_msg("XXX shader zero tripped");
if (s->zero1)
panwrap_msg("XXX shader zero tripped\n");
panwrap_prop("attribute_count = %" PRId16, s->attribute_count);
panwrap_prop("varying_count = %" PRId16, s->varying_count);
panwrap_prop("uniform_count = %" PRId16, s->uniform_count);
panwrap_prop("work_count = %" PRId16, s->work_count);
panwrap_prop("unknown1 = 0x%" PRIx32, s->unknown1);
panwrap_prop("unknown2 = 0x%" PRIx32, s->unknown2);
/* Save for dumps */
attribute_count = s->attribute_count;
varying_count = s->varying_count;
uniform_count = (s->uniform_registers >> 20) & 0xFF;
/* Structure is still somewhat unknown, unfortunately */
int work_register_count = (s->uniform_registers >> 16) & 0xF;
panwrap_prop("uniform_registers = (%d << 20) | (%d << 16) | 0x%" PRIx32, uniform_count, work_register_count, s->uniform_registers & ~0x0FFF0000);
uniform_count = s->uniform_count;
/* WTF? */
panwrap_prop("unknown2_0 = 0x%" PRIx32, s->unknown2_0);
......@@ -385,7 +385,7 @@ void panwrap_replay_vertex_or_tiler_job(const struct mali_job_descriptor_header
/* XXX: This entire block is such a hack... where are uniforms configured exactly? */
if (v->uniforms) {
int rows = uniform_count >> 1, width = 4;
int rows = uniform_count, width = 4;
size_t sz = rows * width * sizeof(float);
struct panwrap_mapped_memory *uniform_mem = panwrap_find_mapped_gpu_mem_containing(v->uniforms);
......
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