Commit 2521424f authored by Connor Abbott's avatar Connor Abbott

bifrost/asm: Fix reading from Port 3 while writing to Port 2

We wouldn't assign port 2 in that case.
parent 0c1b9901
......@@ -830,17 +830,18 @@ class RegisterFile:
read_regs = list(self.read_regs.values())
write_regs = list(self.write_regs.values())
if len(read_regs) == 3:
self._set_reg_port(3, read_regs.pop())
elif len(write_regs) == 2:
if len(write_regs) == 2:
for reg in write_regs:
if reg.write_stage is add:
port = 2
else:
port = 3
self._set_reg_port(port, reg)
elif len(write_regs) == 1:
self._set_reg_port(2, write_regs[0])
else:
if len(write_regs) == 1:
self._set_reg_port(2, write_regs[0])
if len(read_regs) == 3:
self._set_reg_port(3, read_regs.pop())
if len(read_regs) == 2:
if read_regs[0].idx < read_regs[1].idx:
......
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