1. 16 May, 2018 2 commits
  2. 27 Jan, 2018 1 commit
  3. 13 Jan, 2018 2 commits
  4. 10 Oct, 2017 2 commits
    • Eric Anholt's avatar
      broadcom: Add VC5 NIR compiler. · ade416d0
      Eric Anholt authored
      This is a pretty straightforward fork of VC4's NIR compiler to VC5.  The
      condition codes, registers, and I/O have all changed, making the backend
      hard to share, though their heritage is still recognizable.
      v2: Move to src/broadcom/compiler to match intel's layout, rename more
          "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts
          with vc4, use new v3d_debug header, add compiler init/free functions,
          do texture swizzling in NIR to allow optimization.
    • Eric Anholt's avatar
      broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm. · 05c7d971
      Eric Anholt authored
      Unlike VC4, I've defined an unpacked instruction format with pack/unpack
      functions to convert to 64-bit encoded instructions.  This will let us
      incrementally put together our instructions and validate them in a more
      natural way than the QPU_GET_FIELD/QPU_SET_FIELD used to.
      The pack/unpack unfortuantely are written by hand.  While I could define
      genxml for parts of it, there are many special cases (like operand order
      of commutative binops choosing which binop is being performed!) and it
      probably wouldn't come out much cleaner.
      The disasm unit test ensures that we have the same assembly format as
      Broadcom's internal tools, other than whitespace changes.
      v2: Fix automake variable redefinition complaints, add test to .gitignore