Commit b3121bfd authored by Emil Velikov's avatar Emil Velikov

mesa: guard better when building with sse4.1 optimisations

When the compiler is not capable/does not accept -msse4.1 while the target
has the instruction set we'll blow up as _mesa_streaming_load_memcpy is
going to be undefined.

To make sure that never happens, wrap the runtime cpu check+caller in an
ifdef thus do not compile that hunk of the code.

Fix the android build by enabling the optimisation and adding the define
where applicable.

v2: autoconf conditionals end with "fi" rather than endif.
v3: Wrap the definition and call to intel_miptree_{un,}map_movntdqa in
if defined(USE_SSE41). Spotted by Matt.

Cc: Matt Turner <mattst88@gmail.com>
Cc: Adrian Negreanu <adrian.m.negreanu@intel.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov's avatarEmil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner's avatarMatt Turner <mattst88@gmail.com>
parent 07f58318
......@@ -235,6 +235,9 @@ dnl
dnl Optional flags, check for compiler support
dnl
AX_CHECK_COMPILE_FLAG([-msse4.1], [SSE41_SUPPORTED=1], [SSE41_SUPPORTED=0])
if test "x$SSE41_SUPPORTED" = x1; then
DEFINES="$DEFINES -DUSE_SSE41"
fi
AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1])
dnl
......
......@@ -50,6 +50,7 @@ endif # MESA_ENABLE_ASM
ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
LOCAL_SRC_FILES += \
$(SRCDIR)main/streaming-load-memcpy.c
LOCAL_CFLAGS := -msse4.1
endif
LOCAL_C_INCLUDES := \
......
......@@ -35,6 +35,11 @@ include $(LOCAL_PATH)/Makefile.sources
LOCAL_CFLAGS := \
$(MESA_DRI_CFLAGS)
ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
LOCAL_CFLAGS += \
-DUSE_SSE41
endif
LOCAL_C_INCLUDES := \
$(i965_INCLUDES) \
$(MESA_DRI_C_INCLUDES) \
......
......@@ -1843,6 +1843,7 @@ intel_miptree_unmap_blit(struct brw_context *brw,
/**
* "Map" a buffer by copying it to an untiled temporary using MOVNTDQA.
*/
#if defined(USE_SSE41)
static void
intel_miptree_map_movntdqa(struct brw_context *brw,
struct intel_mipmap_tree *mt,
......@@ -1910,6 +1911,7 @@ intel_miptree_unmap_movntdqa(struct brw_context *brw,
map->buffer = NULL;
map->ptr = NULL;
}
#endif
static void
intel_miptree_map_s8(struct brw_context *brw,
......@@ -2290,8 +2292,10 @@ intel_miptree_map(struct brw_context *brw,
mt->bo->size >= brw->max_gtt_map_object_size) {
assert(can_blit_slice(mt, level, slice));
intel_miptree_map_blit(brw, mt, map, level, slice);
#if defined(USE_SSE41)
} else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed && cpu_has_sse4_1) {
intel_miptree_map_movntdqa(brw, mt, map, level, slice);
#endif
} else {
intel_miptree_map_gtt(brw, mt, map, level, slice);
}
......@@ -2328,8 +2332,10 @@ intel_miptree_unmap(struct brw_context *brw,
intel_miptree_unmap_depthstencil(brw, mt, map, level, slice);
} else if (map->mt) {
intel_miptree_unmap_blit(brw, mt, map, level, slice);
#if defined(USE_SSE41)
} else if (map->buffer && cpu_has_sse4_1) {
intel_miptree_unmap_movntdqa(brw, mt, map, level, slice);
#endif
} else {
intel_miptree_unmap_gtt(brw, mt, map, level, slice);
}
......
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