• Alyssa Rosenzweig's avatar
    Squash early Midgard driver · 5a5dc4f5
    Alyssa Rosenzweig authored
    History preserved in a branch.
    
    Rebase meson.build
    
    Fix syntax errors in the meson.build
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Import ir3_cmdline.c from freedreno into panfrost
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Begin removing freedreno-specific code in midgard
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Fix panfrost include
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Fully decouple midgard_cmdline from freedreno
    
    This enables the module to compile, providing stubs for the NIR
    compiler.
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Fix panfrost dependency
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    [midgard] Dump NIR and remove unnecessary passes
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Further reduce midgard
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Iterate NIR instructions
    
    Further simplification
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Ditto
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Trace out emit path for load_const
    
    Store output intrinsic
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Also vertex shaders
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Lower var copies
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Load uniform stub
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    String through compiler context
    
    Learn how to use util_dynarray for current_block
    
    Import midgard shader defines by Connor Abbott
    
    These were found in the original Midgard disassemble by cwabbott,
    extracted from the project cwabbots-open-gpu-tools under the license
    stated. They will be used here for instruction emission in the Midgard
    compiler.
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Iterate midgard instruction types
    
    Remove type, next_type from load_store_t
    
    Instruction type tags
    
    Compute instruction lookahead
    
    Refactor get_lookahead_type
    
    Fix lookahead by lowering tag format
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Fill in part of load_uniform, other ALU tags, etc
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Dump load_store op
    
    Macro for load_uniform instructions
    
    Use for store_vary32 as well
    
    Register aliases
    
    reg, offset arguments to load_store
    
    Hack until we have initial output :)
    
    Swizzle macro
    
    Factor out emit_binary_instruction
    
    Refactor file I/O
    
    Begin emitting ALU ops
    
    ALU padding
    
    I misunderstood padding; fix it
    
    Demonstrate some tacked on constants
    
    Set sources
    
    Move ALU register work
    
    String through constants
    
    Correct registers
    
    Use correct register in fmov
    
    Refactor into M_ALU macro
    
    ALU_2
    
    Factor out attach_constants
    
    Remove print
    
    Emit ALU
    
    Fixes to '
    
    Make register resolution at least somewhat plausible
    
    Remove some debugging prints
    
    ALU source modifiers
    
    EMIT_ALU_CASE to macro
    
    fmul
    
    fmin, fmax
    
    load_vary
    
    Fix src
    
    Shader stage to differentiate varying/attrib load
    
    Algebraic pass
    
    Actual optimisation loop
    
    Import full list of known ALU opcodes
    
    Emit for remaining ALU ops (where possible)
    
    Update ALU ops
    
    Disable incorrect fsin/fcos for now
    
    Correctly implement sin and cos, extending NIR
    
    Explain midgard_instruction in relation to scheduler
    
    Any configuration in load_const is okay
    
    Comment half floats
    
    Don't break aliasing rules
    
    Begin eliminate_constant_mov pass
    
    Finish mov elimination
    
    Use raw SSA in the midgard compiler
    
    Register allocate stub
    
    fmov elimination is much easier in SSA space
    
    Switch to /dev/shm
    
    Try hash
    
    Search for constants
    
    Attach maybe
    
    I feel silly -- fix move elimination
    
    Update compiler options
    
    Reflow constant move loop
    
    Pair load/store instructions
    
    Don't introduce a dependency chain
    
    Correct fmov argument ordering
    
    [midgard] Disable vertex shader compilation
    
    The vertex shader epilogue for these GPUs is not yet well understood;
    it's not worth trying to compile for it quite yet.
    
    [midgard] FMA does not exist for GL
    
    [midgard] Lowering vecs to movs will be useful
    
    [midgard] Fix fmov instruction ordering
    
    [midgard] Properly noop load/stores
    
    midgard: Introduce synthwrite to catch gl_FragColor
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Stub framebuffer write
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Introduce variadic EMIT syntax sugar
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Second half of the fbwrite
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Literal out for proper fbwrite
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Use actual compact writeout fields
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Begin ALU op ombining
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Continue ALU combining work
    
    midgard: Cleanup printfs
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: ALU combining
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Instruction-combining aware lookahead
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Register allocation position
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Workaround missing preliminary load/store errata
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Synthwrite was a mistake
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Fix warnings
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Basic uniform loading support
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Set unknown field in varying load
    
    Saner load varying
    
    midgard: Use adder for add instructions
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Rework load_input, etc to act like vc4/freedreno
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Alias imov to fmov
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Fix store out regrssion
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Begin scalar work
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Don't lower fsat
    
    midgard: Fix build
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Lower to source mods pass
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Saturation arithmetic
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    Refactor ALU emit to allow for scalar emit in future
    
    Remove unnecessary alu defs
    
    Allow scalar ops to be emitted
    
    midgard: Implement scalar_alu_modifiers
    
    Correct swizzle placement
    
    midgard: Correct order
    
    midgard: Account for scalar component special case
    
    midgard: Sort out memory safety regression from scalar refactor
    
    midgard: vlut mask
    
    midgard: Begin porting over vec4 pass from freedreno
    
    midgard: Fix vec4
    
    midgard: Remove deadcode
    
    Fix frcp support
    
    midgard: Fix bugs with scalar source modifiers
    
    midgard: Lower subtraction
    
    midgard: Begin debugging transcendental functions
    
    midgard: Proper SSA register aliasing
    
    midgard: General improvements relating to unused arguments
    
    midgard: Reenable vertex and disable double print
    
    midgard: Only emit fragment epilogue for fragment shaders
    
    midgard: Load attribute
    
    midgard: Assign var locations
    
    midgard: Front-half of SSA aliases
    
    midgard: Further progress on aliasing
    
    midgard: Optimise uniforms similarly
    
    midgard: Fix uniform special case
    
    midgard: Cleanup uniform aliasing
    
    midgard: Cleanup warnings
    
    midgard: Fix nondeterministic segfault
    
    midgard: Fix regression packing with unuseds
    
    midgard: Fix regression in regression fix
    
    midgard: Begin store vary emit
    
    midgard: Begin experimenting with nir_builder
    
    midgard: Write to special register from epilogue
    
    midgard: Load gl_Position in vertex epilogue
    
    midgard: Fix bug in aliasing implementation
    
    midgard: Further hack on vertex shader epilogue
    
    midgard: Defer stores to workaround hw errata?
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    midgard: Fix early constant inline termination
    
    Cut off duplicated embedded constants
    
    midgard: Move vertex epilogue to after var assignment
    
    midgard: Import ugly internal code to fix vertex shader epilogue
    
    midgard: Get vertex shaders working.... somehow
    
    midgard: Reenable fragment compilation
    
    midgard: Fix load/store noop emission
    
    Save real softpipe
    
    panfrost: Dump clears
    
    midgard: Workaround compact branch errata
    
    panfrost: XXX Hack in the trans library XXX
    
    Hook into panfrost, uglily
    
    Continue hacky panfrost integration
    
    panfrost: Begin ripping out drawing to enable shaders
    
    Begin interfacing with the hacky resource stuff
    
    Link in transfer map
    
    Hook up vertex functions
    
    Disable user buffers for now
    
    Solve some segfaults
    
    transfer_unmap
    
    Don't crash
    
    Work fixing varying writes
    
    Remove vertex epilogue varying magic
    
    Proceed implementing vertex 'epilogue' the Right way
    
    Remove cruft that has built up from previous refactor
    
    Update comments; nir_instr_remove old st_vary
    
    Remove now-unused defer_stores
    
    Remove redunant r0 move
    
    Note about the decaying issue
    
    Fix data hazard determination for ld/st pairing
    
    Finally get eliminate_varying_mov working nicely
    
    Cleanup from previous commit
    
    Dot products
    
    Call do_mat_op_to_vec
    
    Wrap do_mat_op_to_vec
    
    Get uniforms doing something somewhat sane
    
    Fix uniform access patterns
    
    Galliumify set_constant_buffer
    
    Cleanup comments
    
    Inline n2m_alu_outmod
    
    Compiler cleanup
    
    Begin watermark RA
    
    Fixes for watermark RA
    
    Proceed writing real RA?
    
    Get RA to work
    
    Quiet output
    
    Add some profiling stubs
    
    Remove redunant lower_io calls
    
    New information re varying registers
    
    Honour literal_out in ls4
    
    Implement vertex epilogue as per 12.5.1
    
    Perspective division
    
    Uniforms are backward; workaround buggy VLIW
    
    Fix crash on resource destory (mesa half)
    
    Remove softpipeism
    
    Work towards correct resizable shm windows
    
    Map the surface in the right place
    
    Continue
    
    Remove what we can
    
    Remove more
    
    Cut more
    
    Strip further
    
    Continue
    
    ACCELERATED flag
    
    Remove
    
    Strip shaders
    
    Fix overzealous inline constants
    
    Encode inline vector constants
    
    Mark errata with ERRATA, not XXX
    
    Enable two instruction chains instead of one
    
    Embedded constants with ALU combining (fixes long-time regression)
    
    Bundle duplicate constants
    
    Cull ssa0 moves (missed from inline constant in luts)
    
    Embedded to inline constant for right-constant scalar ops
    
    Scalar op flip
    
    Remove prints
    
    Inline constants in vector ops
    
    Begin work on instruction unit switching
    
    Branch compact can be packed
    
    Continue unit hopping work
    
    Split out helpers to prepare for updating midgard.h
    
    Pull in new midgard.h from SPD
    
    f2i->u
    
    Basic support for integers
    
    Disable inline constants for the moment, since they're broken
    
    inot requires MUL apparently
    
    Import new ops
    
    Emit ball/bany from NIR
    
    Import backend algebraic NIR pass stuff
    
    nir: Implement optional b2f->iand lowering
    
    This pass is required by the Midgard compiler; our instruction set uses
    NIR-style booleans (~0 for true) but lacks a dedicated b2f instruction.
    Normally, this lowering pass would be implemented in a backend-specific
    algebraic pass, but this conflicts with the existing iand->b2f pass in
    nir_opt_algebraic.py, hanging the compiler. This patch thus makes the
    existing pass optional (default on -- all other backends should remain
    unaffected), adding an optional pass for lowering the opposite
    direction.
    Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
    
    f2b, b2f in midgard
    
    Small cleanup; fix floor/ceil
    
    LUT duplication
    
    Guarantee proper fragment writeout (incurring a temporary performance regression)
    
    Begin working on csel stuff
    
    midgard: Move fsinpi stuff to backend-specific pass
    
    Reenable embedded_to_inline_constant by making it integer aware
    
    Fix constant attaching
    
    ushr opcode
    
    Fix issue with imin/imax blocking
    
    Remove prints
    
    Componentwise test for r0 breakup
    
    Try to debug
    
    When flipping arguments, also flip modifiers
    
    Lower b2i to iand
    
    Fix segfault with inot
    
    Flip vector constants
    
    isub is not commutative
    
    fne _is_ commutative
    
    Remove prints
    
    Get rid of constant moves -- unnecessary complexity
    
    Remove STAGE_PROFILING
    
    Uniform base is no longer needed
    
    Remove unused macro
    
    Enable basic nir_register support in order to chuck out old vec4 pass
    
    Call convert_from_ssa weakly and generalise to registers in LUT duplication
    
    Fix st_vary input bug triggered by vertex epilogue refactor
    
    Mask for clarity
    
    Remove whitespace
    
    Fix annoying compiler segfault
    
    Reenable constant inlining (unaffected by registerisation)
    
    Fix varying move regresison and reenable
    
    Stubs to emit textures from NIR
    
    Begin basic texture op emission
    
    Get texture handles correct
    
    Set flags
    
    Set .cont and .last
    
    Hardcode mask/filter for now
    
    Hardcode a swizzle as well
    
    Force texture full for now
    
    Do something with the input swizzle
    
    Fix spelling error in header
    
    midgard: Emit fmov for source/dest texture
    
    midgard: Lower vars as necessary
    
    Rescale for the replay :v
    
    Handle weird 3D texture swizzle
    
    Stub for cubemap
    
    Hook up texture/sampler functions in softpipe shim
    
    Don't advertise compute/geometry shaders
    
    Import softpipe meson.build into panfrost
    
    Move shim into ~/panfrost
    
    Include panfrost_dri.so
    
    Register as fake swr
    
    Use the panfrost name
    
    Restore original softpipe
    5a5dc4f5
cppwrap.cpp 194 Bytes