Commit 12c45261 authored by Vincent Lejeune's avatar Vincent Lejeune

radeon/llvm: reserve also corresponding 128bits reg

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
parent 88c3647e
......@@ -50,6 +50,7 @@ BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const
for (std::vector<unsigned>::const_iterator I = MFI->ReservedRegs.begin(),
E = MFI->ReservedRegs.end(); I != E; ++I) {
Reserved.set(*I);
Reserved.set(*(getSuperRegisters(*I)));
}
return Reserved;
......
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